Timeline
Sep 23, 2009:
- 9:46 PM Changeset [63] by
- add parameters for number of channels and channel resolution
- 9:45 PM Changeset [62] by
- add polarity flag
- 9:44 PM Changeset [61] by
- add interface for parallel ADC with unreliable clock
- 9:42 PM Changeset [60] by
- interface for parallel ADC with unreliable clock
Sep 18, 2009:
- 1:40 PM Changeset [59] by
- move control and test code to separate modules
- 1:39 PM Changeset [58] by
- code cleanup
Sep 17, 2009:
- 6:39 PM Changeset [57] by
- switch to direct instantiation of altsyncram and dcfifo
- 6:37 PM Changeset [56] by
- switch to direct instantiation of altsyncram
- 6:37 PM Changeset [55] by
- add pll for lvds interface
- 6:35 PM Changeset [54] by
- adapat memory access to normal memory clock
- 6:32 PM Changeset [53] by
- add signal invertor
- 6:31 PM Changeset [52] by
- switch to normal memory clock
Sep 16, 2009:
- 12:52 PM Changeset [51] by
- first attempt to use normal memory clock
- 12:51 PM Changeset [50] by
- fix peak detection logic and add peak threshold
- 12:37 PM Changeset [49] by
- add registers for output data
- 12:35 PM Changeset [48] by
- cleanup test circuit
- 12:34 PM Changeset [47] by
- switch to direct instantiation of altsyncram
- 12:32 PM Changeset [46] by
- use loop for addr and reset initialisation
Sep 15, 2009:
- 3:27 AM Changeset [45] by
- add fourth channel and switch from 32 to 24 bit histogram
Sep 14, 2009:
- 12:55 AM Changeset [44] by
- add baseline subtraction
Sep 12, 2009:
- 12:28 PM Changeset [43] by
- put back lost PIN_98 and PIN_99
- 2:04 AM Changeset [42] by
- code cleanup
- 1:16 AM Changeset [41] by
- add one real ADC channel
Sep 11, 2009:
- 4:21 PM Changeset [40] by
- turn led off at startup
Sep 8, 2009:
- 1:32 PM Changeset [39] by
- add configuration for EPCS16
- 1:02 PM Changeset [38] by
- add serial flash loader
Sep 7, 2009:
- 7:21 AM Changeset [37] by
- fix communication with fifo_rx_unit
- 7:19 AM Changeset [36] by
- several minor fixes
- 1:01 AM Changeset [35] by
- first working version
- 12:04 AM Changeset [34] by
- working test version
- 12:03 AM Changeset [33] by
- return to simple USB interface with some adjustments
Sep 4, 2009:
- 10:42 PM Changeset [32] by
- change LED polarity
- 10:16 PM Changeset [31] by
- attemp to improve USB interface
Sep 3, 2009:
- 2:34 PM Changeset [30] by
- put all components in place
- 2:33 PM Changeset [29] by
- split USB_PA into separate wires
- 12:29 AM Changeset [28] by
- fix PINFLAGSAB configuration
- 12:27 AM Changeset [27] by
- initial commit
Sep 1, 2009:
- 10:47 PM Changeset [26] by
- add PINFLAGSAB configuration
- 10:09 PM Changeset [25] by
- remove OE
- 10:08 PM Changeset [24] by
- put back str3
- 10:07 PM Changeset [23] by
- fix configuration comment
Aug 31, 2009:
- 1:50 PM Changeset [22] by
- remove pin CON_B[16]
Aug 29, 2009:
- 8:22 PM Changeset [21] by
- cleanup vendor commands
- 11:40 AM Changeset [20] by
- rename hw_fynu to hw_basic
- 9:32 AM Changeset [19] by
- fix OE bitmasks
- 12:44 AM Changeset [18] by
- fix pin 162 configuration
- 12:42 AM Changeset [17] by
- fix pin 162 configuration
- 12:02 AM Changeset [16] by
- fix pin names
Aug 28, 2009:
- 11:58 PM Changeset [15] by
- set RAM_ADDR to all zeros
- 11:57 PM Changeset [14] by
- fix pin names
- 11:49 PM Changeset [13] by
- fix pin directions
- 11:49 PM Changeset [12] by
- fix pin names
- 11:31 PM Changeset [11] by
- fix pin assignment
- 3:59 PM Changeset [10] by
- initial commit
Aug 27, 2009:
- 6:07 PM Changeset [9] by
- fix EOL codes
- 5:59 PM Changeset [8] by
- remove rules for usbjtag.iic
- 5:46 PM Changeset [7] by
- fix EOL codes
- 5:39 PM Changeset [6] by
- put back SI_SERIAL
- 2:37 PM Changeset [5] by
- adapt to latest usb_jtag sources and altera drivers
Note:
See TracTimeline
for information about the timeline view.