Changeset 54

Timestamp:

Sep 17, 2009, 6:35:11 PM (15 years ago)

Author:

demin

Message:

adapat memory access to normal memory clock

File:

• trunk/MultiChannelUSB/Paella.v (modified) (12 diffs)

trunk/MultiChannelUSB/Paella.v

@@ -143 +143 @@
     assign      adc_clk[1] = ADC_FCO;
     assign      adc_clk[2] = ADC_FCO;
-/*    
+    
     assign      adc_clk[3] = CON_B[0];
     assign      adc_data[3] = CON_B[12:1];
-*/ 
+ 
+        wire                    adc_pll_clk;
+
         wire                    tst_adc_clk;
         reg     [11:0]  tst_adc_data;
-
+/*
     assign      adc_clk[3] = tst_adc_clk;
     assign      adc_data[3] = tst_adc_data;
+*/
+/*
+        adc_pll adc_pll_unit(
+                .inclk0(ADC_FCO),
+                .c0(adc_pll_clk));
+*/
 
         pll pll_unit(
@@ -170 +178 @@
                 .sdoin());
 */
+
         adc_lvds adc_lvds_unit (
                 .lvds_dco(ADC_DCO),
+//              .lvds_dco(adc_pll_clk),
                 .lvds_fco(ADC_FCO),
                 .lvds_d(ADC_D),
@@ -180 +190 @@
         genvar i;
         generate
-                for (i = 2; i < 4; i = i + 1)
+                for (i = 0; i < 4; i = i + 1)
                 begin : MCA_CHAIN
                         adc_fifo adc_fifo_unit (
@@ -197 +207 @@
                                 .uwt_flag(uwt_flag[i]),
                                 .uwt_data(uwt_data[i]),
-                                .threshold(12'd5),
+                                .threshold(12'd10),
                                 .peak_ready(ana_peak_ready[i]),
                                 .peak(ana_peak[i]));
-/*
+
                         histogram histogram_unit (
                                 .clk(CLK_50MHz),
                                 .reset(hst_reset[i]),
                                 .data_ready(adc_data_ready[i]),
-                                .data(raw_data[i]),
+//                              .data(raw_data[i]),
+                                .data(uwt_data[i]),
                                 .address(hst_addr[i]),
                                 .q(hst_q[i]));
-*/
+/*
                         histogram histogram_unit (
                                 .clk(CLK_50MHz),
@@ -216 +227 @@
                                 .address(hst_addr[i]),
                                 .q(hst_q[i]));
-                        
+*/                      
                         oscilloscope oscilloscope_unit (
                                 .clk(CLK_50MHz),
@@ -223 +234 @@
                                 .raw_data(raw_data[i]),
                                 .uwt_data(uwt_data[i]),
-                                .threshold(16'd100),
+                                .threshold(16'd40),
                                 .address(osc_addr[i]),
                                 .start_address(osc_start_addr[i]),
@@ -341 +352 @@
                                                         usb_fifo_rx_rdreq <= 1'b0;
                                                         tst_counter <= 11'd0;   
-                                                        state1 <= 4'd9;
+                                                        state1 <= 4'd6;
                                                 end
                                         endcase
@@ -354 +365 @@
                                 state1 <= 4'd4;
                         end
+        
                         4:
                         begin
-                                usb_fifo_tx_data <= mux_q;
-                                usb_fifo_tx_wrreq <= 1'b1;
-                                mux_byte <= 2'd1;
+                                usb_fifo_tx_wrreq <= 1'b0;
                                 state1 <= 4'd5;
                         end
+
                         5:
                         begin
@@ -366 +377 @@
                                 begin
                                         usb_fifo_tx_data <= mux_q;
+                                        usb_fifo_tx_wrreq <= 1'b1;
                                         if ((mux_byte == mux_max_byte) && (mux_addr == mux_max_addr))
                                         begin
-                                                state1 <= 4'd6;
+                                                state1 <= 4'd1;
                                         end
                                         else
                                         begin
+                                                state1 <= 4'd4;
                                                 if (mux_byte == mux_max_byte)
                                                 begin
@@ -384 +397 @@
                                 end
                         end
+
+                        // tst transfer
                         6:
-                        begin
-                                if (~usb_fifo_tx_full)
-                                begin
-                                        usb_fifo_tx_wrreq <= 1'b0;
-                                        state1 <= 4'd1;
-                                end
-                        end
-                        // tst transfer
-                        7:
                         begin
                                 usb_fifo_tx_data <= tst_counter;
@@ -400 +406 @@
                                 state1 <= 4'd8;
                         end
-                        8:
+                        7:
                         begin
                                 if (~usb_fifo_tx_full)
@@ -415 +421 @@
                                 end
                         end
-                        9:
+                        8:
                         begin
                                 if (~usb_fifo_tx_full)