Changeset 5

Timestamp:

Aug 27, 2009, 2:37:55 PM (15 years ago)

Author:

demin

Message:

adapt to latest usb_jtag sources and altera drivers

Location:

trunk/FirmwareFX2

Files:

• dscr.a51 (modified) (3 diffs)
• fx2/Makefile (modified) (1 diff)
• readme.txt (modified) (4 diffs)

trunk/FirmwareFX2/dscr.a51

@@ -315 +315 @@
         .db        <str1, >str1
         .db        <str2, >str2
-        .db        <str3, >str3
 _string_descriptors_end:
 
@@ -335 +334 @@
 str1:   .db        str1_end - str1
         .db        DSCR_STRING
-        .db        'F, 0            ; 16-bit unicode
-        .db        'Y, 0
-        .db        'N, 0
-        .db        'U, 0
+        .db        'A, 0            ; 16-bit unicode
+        .db        'l, 0
+        .db        't, 0
+        .db        'e, 0
+        .db        'r, 0
+        .db        'a, 0
 str1_end:
 
@@ -358 +359 @@
         .db        'r, 0
 str2_end:
-
-        SI_SERIAL = 3
-        .even
-_str3::
-str3:   .db        str3_end - str3
-        .db        DSCR_STRING
-        .db        '0, 0
-        .db        '0, 0
-        .db        '0, 0
-        .db        '0, 0
-        .db        '0, 0
-        .db        '0, 0
-        .db        '0, 0
-        .db        '0, 0
-str3_end:
-

trunk/FirmwareFX2/fx2/Makefile

@@ -19 +19 @@
 CFLAGS+=-mmcs51 --no-xinit-opt -I.
 CPPFLAGS+=
+OBJS=delay.rel fx2utils.rel i2c.rel isr.rel timer.rel usb_common.rel
+AR=sdcclib
 
-%.rel : %.c
-        $(CC) -c $(CFLAGS) $(CPPFLAGS) $< -o $@
+(%.rel) : %.c
+        $(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $*.rel
+        $(AR) -a $@ $*.rel
+        rm $*.rel
 
-libfx2.lib: delay.rel fx2utils.rel i2c.rel isr.rel timer.rel usb_common.rel
-        rm -f $@
-        touch $@
-        for obj in $^ ; do basename $$obj .rel >> $@ ; done
+libfx2.lib: libfx2.lib($(OBJS))
 
 clean:

trunk/FirmwareFX2/readme.txt

@@ -2 +2 @@
 ===============================
 
-The code in this directory is for Cypress FX2 (e.g. CY7C68013A) and can be compiled with
-the SDCC compiler (I tried version 2.6 as shipped with Ubuntu 6.10). Once I had a version
-that could be compiled with Keil tools (until early 2007), but switched to SDCC because I 
-usually develop on a Linux host.
+== General information ==
 
-No logic beside the FX2 itself and only a few external components are required for a basic
-JTAG adapter. I don't have detailed schematics available; my test setup consists of a FX2
-on a custom board where it's directly connected to a Cyclone FPGA.
+The code in this directory is for Cypress FX2 (e.g. CY7C68013A) and can be
+compiled with the SDCC compiler (I tried version 2.6 as shipped with Ubuntu
+6.10). Once I had a version that could be compiled with Keil tools (until early
+2007), but switched to SDCC because I usually develop on a Linux host.
+
+No logic beside the FX2 itself and only a few external components are required
+for a basic JTAG adapter. I don't have detailed schematics available; my test
+setup consists of a FX2 on a custom board where it's directly connected to a
+Cyclone FPGA.
 
         ____________
@@ -23 +26 @@
 
 
-Similar eval boards are now available from fpga4fun.com - the boards named
-"Saxo-L" and "Xylo-EM" are pre-wired for use with an adapted version of my
-code, while "Saxo" and "Xylo" can be used after soldering 4 extra wires:
+Similar boards are available from fpga4fun.com - the boards named "Saxo-L" and
+"Xylo-EM" are pre-wired for use with an adapted version of my code, while
+"Saxo" and "Xylo" can be used after soldering 4 extra wires:
 
         http://www.fpga4fun.com/board_Xylo.html
 
+There's a discussion thread in the fpga4fun forum about this firmware:
+
+    http://www.fpga4fun.com/forum/viewtopic.php?t=483
+
+
+== Adapting the code to your hardware ==
 
 As is, the code assumes the following pin assignment:
@@ -37 +46 @@
  Port C.3: TMS
 
-Other assignments are possible; you'll have to adapt the definitions in hardware.h and maybe
-in hardware.c, too.
+Other assignments are possible. If you have your signals connected to
+bit-addressable I/O pins (port A,B,C or D), I suggest you make a copy of
+hw_basic.c and adapt the definitions and ProgIO_Init() in it to your needs.
+The file hw_saxo_l is even simpler to adapt if you want only JTAG and no AS/PS
+mode.  If your signals are not on bit-addressable I/Os (that is, you're using
+port E), you could base your adaptation on the slower hw_xpcu_i.c. You may
+specify the name of your adapted hardware-specific file when "make"ing, e.g.:
 
-The USB identification data (vendor/product ID, strings, ...) can be modified in dscr.a51. My
-firmware emulates the 128 byte EEPROM that usually holds configuration data for the FT245 and
-which can be read from the host; its content is computed from the data in dscr.a51 as well.
+  make HARDWARE=hw_saxo_l
 
-The WAKEUP pin should be high for the re-numeration to work reliably (thanks Jean/fpga4fun!)
 
-From this release on, there is new code to support running in the "Xilinx
-Platform Cable USB". If you select HARDWARE=hw_xpcu_i or hw_xpcu_x at the top
-of the Makefile, a firmware for the XPCU will be built. I've tested this only
-with unmodified CPLD version 18 (0x12) on a Spartan-3E starter kit, as it was
-programmed by my WebPack 8.2i. The code needs optimization; yet it is merely a
-proof of concept.
+The USB identification data (vendor/product ID, strings, ...) can be modified
+in dscr.a51. The firmware emulates the 128 byte EEPROM that usually holds
+configuration data for the FT245 and which can be read from the host; its
+content (including checksum) is computed from the data in dscr.a51 as well.  
+
+The WAKEUP pin should be high for the re-numeration to work reliably (thanks
+Jean/fpga4fun!).
+
+
+== Using it with Xilinx JTAG cable ==
+
+There is code to support running in the "Xilinx Platform Cable USB". If you
+select HARDWARE=hw_xpcu_i or hw_xpcu_x at the top of the Makefile, a firmware
+for the XPCU will be built. I've tested this only with unmodified CPLD version
+18 (0x12) on a Spartan-3E starter kit, as it was programmed by my WebPack 8.2i.
+The code needs optimization; yet it is merely a proof of concept.
+Compile for the XPCU with e.g. "make HARDWARE=hw_xpcu_x".
 
  hw_xpcu_i: Access "internal" chain (the XPCU CPLD, IC3, itself)
  hw_xpcu_x: Access "external" chain (the Spartan 3E, PROM, etc.)
+
+
+== History ==
+
+Changes since previous release on 2007-02-15:
+  - Jean Nicolle contributed hw_saxo_l.c for the FX2 boards from fpga4fun.com
+  - fx2/Makefile fixed to build correct libfx2.lib even under Windows.
 
 Changes since previous release on 2007-01-28:
@@ -60 +89 @@
   - New FX2 code, based on USRP2 from the GNU Radio Project;
   - Firmware can now be compiled using SDCC 2.6. No more Keil support.
-  - EEPROM content is automatically computed from descriptors, including checksum.
+  - EEPROM content is automatically computed from dscr.a51, including checksum.
 
 Changes since initial release on 2006-04-23:
   - added this readme.txt
-  - reorganized my project folder: diff is now created from Subversion repository
+  - reorganized my project folder: diff now created from Subversion repository
   - stripped *.dist extension from eeprom.c and dscr.a51 
   - added unique proper product and vendor ID (thanks to Antti Lukats!)