Changeset 31 for trunk/MultiChannelUSB/Paella.v

Timestamp:

Sep 4, 2009, 10:16:52 PM (15 years ago)

Author:

demin

Message:

attemp to improve USB interface

File:

• trunk/MultiChannelUSB/Paella.v (modified) (13 diffs)

trunk/MultiChannelUSB/Paella.v

@@ -70 +70 @@
 
         reg             [31:0]  counter;        
+        reg                             led_reg;        
 //      assign  LED                     =       counter[24];
-        assign  LED                     =       usb_fifo_rx_empty;
+//      assign  LED                     =       ~usb_fifo_rx_empty;
+        assign  LED                     =       led_reg;
+//      assign  LED                     =       usb_fifo_led;
 
         wire                    usb_wrreq, usb_rdreq, usb_rden, usb_pktend;
@@ -103 +106 @@
                 .tx_full(usb_fifo_tx_full),
                 .rx_empty(usb_fifo_rx_empty),
-//              .led(usb_fifo_led),
-                .rx_data(usb_fifo_rx_data)
+                .rx_data(usb_fifo_rx_data),
+                .led(usb_fifo_led)
         );
         
@@ -216 +219 @@
                         2: 
                         begin
+                                usb_fifo_rx_rdreq <= ~usb_fifo_rx_empty;
                                 if (~usb_fifo_rx_empty)
                                 begin
-                                        usb_fifo_rx_rdreq <= 1'b1;
                                         case (usb_fifo_rx_data)
                                                 8'h30:
@@ -227 +230 @@
                                                 8'h31:
                                                 begin
+                                                        led_reg <= 1'b1;
                                                         hst_addr <= 12'd0;
                                                         hst_byte_num <= 2'd0;   
@@ -238 +242 @@
                                                 8'h33:
                                                 begin
+                                                        led_reg <= 1'b0;
                                                         osc_addr <= osc_start_addr;
                                                         osc_counter <= 10'd0;
@@ -243 +248 @@
                                                         state1 <= 3'd4;
                                                 end
+
                                         endcase
                                 end
-                                else
-                                begin
-                                        usb_fifo_rx_rdreq <= 1'b0;
-                                end                             
                         end
 
@@ -254 +256 @@
                         begin
                                 // hst transfer
+                                usb_fifo_rx_rdreq <= 1'b0;
+                                usb_fifo_tx_wrreq <= ~usb_fifo_tx_full;
                                 if (~usb_fifo_tx_full)
                                 begin
-                                        usb_fifo_tx_wrreq <= 1'b1;
-
                                         case (hst_byte_num)
                                                 2'd0: usb_fifo_tx_data <= hst_q[7:0];
@@ -267 +269 @@
                                         if (&hst_byte_num)
                                         begin
-                                                hst_byte_num <= 2'd0;                           
                                                 if (&hst_addr)
                                                 begin
@@ -277 +278 @@
                                                 end
                                         end
-                                        else
-                                        begin
-                                                hst_byte_num <= hst_byte_num + 2'd1;                            
-                                        end                             
-                                end
-                                else
-                                begin
-                                        usb_fifo_tx_wrreq <= 1'b0;
+
+                                        hst_byte_num <= hst_byte_num + 2'd1;                            
                                 end
                         end
@@ -291 +286 @@
                         begin
                                 // osc transfer
+                                usb_fifo_rx_rdreq <= 1'b0;
+                                usb_fifo_tx_wrreq <= ~usb_fifo_tx_full;
                                 if(~usb_fifo_tx_full)
                                 begin
-                                        usb_fifo_tx_wrreq <= 1'b1;
-
                                         case (osc_byte_num)
                                                 1'd0: usb_fifo_tx_data <= osc_q[7:0];
@@ -302 +297 @@
                                         if (osc_byte_num)
                                         begin
-                                                osc_byte_num <= 1'd0;                           
                                                 if (&osc_counter)
                                                 begin
@@ -313 +307 @@
                                                 end
                                         end
-                                        else
-                                        begin
-                                                osc_byte_num <= 1'd1;                           
-                                        end                                                                             
-                                end
-                                else
-                                begin
-                                        usb_fifo_tx_wrreq <= 1'b0;
+
+                                        osc_byte_num <= ~osc_byte_num;                          
                                 end
                         end
@@ -331 +319 @@
                 endcase
         end
+
 /*
         always @(posedge CLK_50MHz)