Changeset 97

Timestamp:

Mar 12, 2010, 11:53:40 AM (15 years ago)

Author:

demin

Message:

rename several interface wires

File:

• trunk/MultiChannelUSB/adc_fifo.v (modified) (7 diffs)

trunk/MultiChannelUSB/adc_fifo.v

@@ -4 +4 @@
         )
         (
-                input   wire                    adc_clk,
+                input   wire                    adc_clock,
                 input   wire    [W-1:0] adc_data,
 
-                input   wire                    sys_clk,
-                output  wire                    sys_good,
+                input   wire                    sys_clock,
+                output  wire                    sys_frame,
                 output  wire    [W-1:0] sys_data
         );
@@ -15 +15 @@
         reg             [W-1:0] int_data;
         
-        reg                             state, int_rdreq, int_good;
+        reg                             state, int_rdreq, int_frame;
         wire                    int_wrfull, int_rdempty;
 
@@ -33 +33 @@
                 .aclr(1'b0),
                 .data(adc_data),
-                .rdclk(sys_clk),
+                .rdclk(sys_clock),
                 .rdreq((~int_rdempty) & int_rdreq),
-                .wrclk(adc_clk),
+                .wrclk(adc_clock),
                 .wrreq(~int_wrfull),
                 .q(int_q),
@@ -45 +45 @@
                 .wrusedw());
 
-        always @(posedge sys_clk)
+        always @(posedge sys_clock)
         begin
                 case (state)
@@ -51 +51 @@
                         begin
                                 int_rdreq <= 1'b1;
-                                int_good <= 1'b0;
+                                int_frame <= 1'b0;
                                 state <= 1'b1;
                         end
@@ -61 +61 @@
                                         int_data <= int_q;
                                         int_rdreq <= 1'b0;
-                                        int_good <= 1'b1;
+                                        int_frame <= 1'b1;
                                         state <= 1'b0;
                                 end
@@ -68 +68 @@
         end
         
-        assign  sys_good = int_good;
+        assign  sys_frame = int_frame;
         assign  sys_data = int_data;