Changeset 178 for trunk/3DEES/amplitude.v

Timestamp:

Dec 20, 2013, 10:10:03 AM (12 years ago)

Author:

demin

Message:

adapt to 6ch

File:

• trunk/3DEES/amplitude.v (modified) (9 diffs)

trunk/3DEES/amplitude.v

@@ -5 +5 @@
         (
                 input   wire                            clock, frame, reset,
-                input   wire    [width-1:0]     cfg_data,
+                input   wire    [width-1:0]     min_data,
+                input   wire    [width-1:0]     max_data,
                 input   wire    [width-1:0]     inp_data,
                 output  wire    [width-1:0]     out_data,
-                output  wire                            out_flag
+                output  wire    [1:0]           out_flag
         );
 
@@ -20 +21 @@
         wire                            int_comp_wire;
         reg                                     int_comp_reg, int_comp_next;
+
+        reg             [5:0]           int_cntr_reg, int_cntr_next;
 
         assign int_comp_wire = (inp_data_reg[1] < inp_data);
@@ -35 +38 @@
                         int_flag_reg <= 1'b0;
                         int_comp_reg <= 1'b0;
+                        int_cntr_reg <= 6'd0;
                 end
                 else
@@ -46 +50 @@
                         int_flag_reg <= int_flag_next;
                         int_comp_reg <= int_comp_next;
+                        int_cntr_reg <= int_cntr_next;
                 end
         end
@@ -59 +64 @@
                 int_flag_next = int_flag_reg;
                 int_comp_next = int_comp_reg;
+                int_cntr_next = int_cntr_reg;
                 
                 case (int_case_reg)
@@ -71 +77 @@
                                         out_flag_next = 1'b0;
                                         // minimum
-                                        if ((~int_comp_reg) & (int_comp_wire))
+                                        if ((~int_comp_reg) & (int_comp_wire) & int_cntr_reg[5])
                                         begin
                                                 int_mini_next = inp_data_reg[0];
                                                 int_flag_next = 1'b1;
                                         end
-                                        // maximum
+                                        // maximum after minimum
                                         else if ((int_comp_reg) & (~int_comp_wire) & (int_flag_reg))
                                         begin
@@ -83 +89 @@
                                                 int_case_next = 1'b1;
                                         end
+                                        else if (~int_cntr_reg[5])
+                                        begin
+                                                int_cntr_next = int_cntr_reg + 6'd1;
+                                        end
                 end
                         end
@@ -88 +98 @@
                         1:
                         begin
-                                out_flag_next = (out_data_reg >= cfg_data);
+                                if (out_data_reg > min_data)
+                                begin
+                                        int_cntr_next = 6'b0;
+//                                      out_flag_next = 1'b1;
+                                        out_flag_next = (inp_data_reg[1] < max_data);
+                                end
                                 int_case_next = 1'b0;
                         end
@@ -96 +111 @@
 
         assign out_data = out_data_reg;
-        assign out_flag = out_flag_reg;
+        assign out_flag = {~int_cntr_reg[5], out_flag_reg};
 
 endmodule