Changeset 104 for trunk/MultiChannelUSB/usb_fifo.v
- Timestamp:
- Mar 29, 2010, 5:27:56 PM (14 years ago)
- File:
-
- 1 edited
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trunk/MultiChannelUSB/usb_fifo.v
r90 r104 1 1 module usb_fifo 2 2 ( 3 input wire usb_cl k,3 input wire usb_clock, 4 4 inout wire [7:0] usb_data, 5 5 input wire usb_full, usb_empty, … … 7 7 output wire [1:0] usb_addr, 8 8 9 input wire cl k,9 input wire clock, 10 10 input wire tx_wrreq, rx_rdreq, 11 11 input wire [7:0] tx_data, … … 39 39 .aclr(1'b0), 40 40 .data(tx_data), 41 .rdclk(usb_cl k),41 .rdclk(usb_clock), 42 42 .rdreq(int_wrreq), 43 .wrclk(cl k),43 .wrclk(clock), 44 44 .wrreq(tx_wrreq), 45 45 .q(int_tx_q), … … 66 66 .aclr(1'b0), 67 67 .data(int_rx_data), 68 .rdclk(cl k),68 .rdclk(clock), 69 69 .rdreq(rx_rdreq), 70 .wrclk(usb_cl k),70 .wrclk(usb_clock), 71 71 .wrreq(int_rdreq), 72 72 .q(rx_q), … … 86 86 assign int_pktend = (&idle_counter); 87 87 88 always @ (posedge usb_cl k)88 always @ (posedge usb_clock) 89 89 begin 90 90 // respect 1 clock delay between fifo selection
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