Changeset 24d49b4 in git
- Timestamp:
- Apr 3, 2017, 5:38:16 PM (8 years ago)
- Branches:
- ImprovedOutputFile, Timing, dual_readout, llp, master
- Children:
- accffb9
- Parents:
- e576ef60 (diff), 781edf86 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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- 1 edited
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modules/TrackPileUpSubtractor.cc
re576ef60 r24d49b4 161 161 // assume perfect pile-up subtraction for tracks outside fZVertexResolution 162 162 163 if(candidate->Charge !=0 && TMath::Abs(z-zvtx) > fFormula->Eval(pt, eta, phi, e)* 1.0e3)163 if(candidate->Charge !=0 && candidate->IsPU && TMath::Abs(z-zvtx) > fFormula->Eval(pt, eta, phi, e)* 1.0e3) 164 164 { 165 165 candidate->IsRecoPU = 1;
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