Timeline



Nov 25, 2009:

11:02 PM Changeset [73] by demin
first working version
11:02 PM Changeset [72] by demin
testing all components together
11:01 PM Changeset [71] by demin
move to central clock domain

Nov 23, 2009:

12:50 PM Changeset [70] by demin
intermediate working version with 32 bit histograms, test block and …

Nov 22, 2009:

11:16 PM Changeset [69] by demin
add I2C master
11:13 PM Changeset [68] by demin
add I2C master and switch from 24 to 32 bit histogram
11:12 PM Changeset [67] by demin
switch from 24 to 32 bit histogram
11:10 PM Changeset [66] by demin
first working version

Nov 19, 2009:

12:09 AM Changeset [65] by demin
start testing SRAM
12:08 AM Changeset [64] by demin
switch eab on
Note: See TracTimeline for information about the timeline view.