Changeset 69 for trunk/MultiChannelUSB/control.v

Timestamp:

Nov 22, 2009, 11:16:41 PM (15 years ago)

Author:

demin

Message:

add I2C master

File:

• trunk/MultiChannelUSB/control.v (modified) (25 diffs)

trunk/MultiChannelUSB/control.v

@@ -4 +4 @@
                 input   wire                    rx_empty, tx_full,
                 input   wire    [7:0]   rx_data,
+
                 input   wire    [1:0]   mux_max_byte,
                 input   wire    [15:0]  mux_min_addr, mux_max_addr,
@@ -13 +14 @@
                 output  wire    [1:0]   mux_byte,
                 output  wire    [15:0]  mux_addr,
+
                 output  wire                    rx_rdreq,
                 output  wire                    tx_wrreq,
                 output  wire    [7:0]   tx_data,
+
                 output  wire                    ram_we,
                 output  wire    [19:0]  ram_addr,
                 inout   wire    [17:0]  ram_data,
+
+                output  wire                    i2c_wrreq,
+                output  wire    [15:0]  i2c_data,
+                input   wire                    i2c_full,
+
                 output  wire                    led
         );
@@ -33 +41 @@
         reg                             int_led;
 
+        reg     [15:0]  int_i2c_data;
+        reg                     int_i2c_wrreq;
+
 
         wire                    crc_error = 1'b0;
@@ -39 +50 @@
         reg             [4:0]   idle_counter;
 
-        reg             [3:0]   state;
+        reg             [4:0]   state;
         
         wire    [15:0]  src, dst;
@@ -56 +67 @@
         assign  int_ram_q = ram_data;
 //      assign  ram_data = int_ram_we ? int_ram_data : 18'bz;
-        assign  ram_addr = {ram_counter[18:5],1'd0,ram_counter[4:0]};
+//      assign  ram_addr = {ram_counter[18:5],1'd0,ram_counter[4:0]};
+        assign  ram_addr = {1'd0, ram_counter[18:0]};
 
         genvar j;
@@ -101 +113 @@
                                 idle_counter <= 5'd0;
                                 byte_counter <= 3'd0;
-                                state <= 4'd1;
+                                state <= 5'd1;
                         end
 
@@ -115 +127 @@
                                         begin
                                                 int_rdreq <= 1'b0;
-                                                state <= 4'd2;
+                                                state <= 5'd2;
                                         end
                                 end
@@ -125 +137 @@
                                                 int_rdreq <= 1'b0;
                                                 crc_reset <= 1'b1;
-                                                state <= 4'd0;
+                                                state <= 5'd0;
                                         end
                                 end
@@ -140 +152 @@
                                                 16'h0000:
                                                 begin
-                                                        state <= 4'd0;
+                                                        state <= 5'd0;
                                                 end
 
@@ -148 +160 @@
                                                         int_chan <= src[1:0];
                                                         int_reset <= 1'b1;
-                                                        state <= 4'd0;
+                                                        state <= 5'd0;
                                                 end
 
@@ -155 +167 @@
                                                         int_type <= src[4];
                                                         int_chan <= src[1:0];
-                                                        state <= 4'd3;
+                                                        state <= 5'd3;
                                                 end
 
@@ -161 +173 @@
                                                 begin
                                                         tst_counter <= 11'd0;   
-                                                        state <= 4'd6;
+                                                        state <= 5'd6;
                                                 end
                                                 16'h0004:
@@ -168 +180 @@
                                                         int_ram_data <= 18'd0;
                                                         ram_counter <= 19'd0;   
-                                                        state <= 4'd9;
+                                                        state <= 5'd9;
+                                                end
+                                                16'h0005:
+                                                begin
+                                                        int_i2c_data <= src;
+                                                        int_i2c_wrreq <= 1'b1;
+                                                        state <= 5'd15;
                                                 end
                                         endcase
@@ -182 +200 @@
                                 int_max_byte <= mux_max_byte;
                                 int_byte <= 2'd0;       
-                                state <= 4'd4;
+                                state <= 5'd4;
                         end
         
@@ -188 +206 @@
                         begin
                                 int_wrreq <= 1'b0;
-                                state <= 4'd5;
+                                state <= 5'd5;
                         end
 
@@ -199 +217 @@
                                         if ((int_byte == int_max_byte) && (int_addr == int_max_addr))
                                         begin
-                                                state <= 4'd0;
+                                                state <= 5'd0;
                                         end
                                         else
                                         begin
-                                                state <= 4'd4;
+                                                state <= 5'd4;
                                                 if (int_byte == int_max_byte)
                                                 begin
@@ -224 +242 @@
                                 int_wrreq <= 1'b1;
                                 tst_counter <= tst_counter + 11'd1;
-                                state <= 4'd7;
+                                state <= 5'd7;
                         end
                         7:
@@ -233 +251 @@
                                         if (&tst_counter)
                                         begin
-                                                state <= 4'd8;
+                                                state <= 5'd8;
                                         end
                                         else
@@ -246 +264 @@
                                 begin
                                         int_wrreq <= 1'b0;
-                                        state <= 4'd0;
+                                        state <= 5'd0;
                                 end
                         end
@@ -253 +271 @@
                         begin
                                 crc_reset <= 1'b0;
-                                state <= 4'd10;
+                                state <= 5'd10;
                         end
                         10:
@@ -261 +279 @@
                                 if (&ram_counter)
                                 begin
-                                        state <= 4'd11;
+                                        state <= 5'd11;
                                 end
                                 else
                                 begin
-                                        state <= 4'd9;
+                                        state <= 5'd9;
                                         ram_counter <= ram_counter + 19'd1;
                                 end
@@ -274 +292 @@
                                 int_ram_data <= 18'd0;
                                 ram_counter <= 19'd0;
-                                state <= 4'd12;
+                                state <= 5'd12;
                         end
                         12:
                         begin
                                 int_wrreq <= 1'b0;
-                                state <= 4'd13;
+                                state <= 5'd13;
                         end
                         13:
                         begin
-                                state <= 4'd14;
+                                state <= 5'd14;
                         end
                         14:
@@ -293 +311 @@
                                         if (&ram_counter)
                                         begin
-                                                state <= 4'd0;
+                                                state <= 5'd0;
                                         end
                                         else
                                         begin
-                                                state <= 4'd12;
+                                                state <= 5'd12;
                                                 ram_counter <= ram_counter + 19'd1;
                                         end
@@ -303 +321 @@
                         end
                                                 
+                        // i2c write
+                        15:
+                        begin
+                                crc_reset <= 1'b0;
+                                if (~i2c_full)
+                                begin
+                                        int_i2c_wrreq <= 1'b0;
+                                        state <= 5'd0;
+                                end
+                        end
+
                         default:
                         begin
-                                state <= 4'd0;
+                                state <= 5'd0;
                         end
                 endcase
@@ -318 +347 @@
         assign  tx_wrreq = int_wrreq & (~tx_full);
         assign  tx_data = int_data;
+        assign  i2c_wrreq = int_i2c_wrreq;
+        assign  i2c_data = int_i2c_data;
         assign  led = int_led;