Changeset 69 for trunk/MultiChannelUSB
- Timestamp:
- Nov 22, 2009, 11:16:41 PM (15 years ago)
- Location:
- trunk/MultiChannelUSB
- Files:
-
- 2 edited
-
Paella.qsf (modified) (4 diffs)
-
control.v (modified) (25 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/MultiChannelUSB/Paella.qsf
r61 r69 59 59 set_global_assignment -name VERILOG_FILE oscilloscope.v 60 60 set_global_assignment -name VERILOG_FILE usb_fifo.v 61 set_global_assignment -name VERILOG_FILE i2c_fifo.v 61 62 set_global_assignment -name VERILOG_FILE uwt_bior31.v 62 63 set_global_assignment -name VERILOG_FILE test.v … … 110 111 set_location_assignment PIN_70 -to USB_PB[2] 111 112 set_location_assignment PIN_71 -to USB_PB[3] 112 set_location_assignment PIN_72 -to CON_A[0]113 set_location_assignment PIN_73 -to CON_A[1]114 set_location_assignment PIN_76 -to CON_A[ 2]115 set_location_assignment PIN_78 -to CON_A[ 3]116 set_location_assignment PIN_80 -to CON_A[ 4]117 set_location_assignment PIN_81 -to CON_A[ 5]118 set_location_assignment PIN_82 -to CON_A[ 6]113 set_location_assignment PIN_72 -to I2C_SDA 114 set_location_assignment PIN_73 -to I2C_SCL 115 set_location_assignment PIN_76 -to CON_A[0] 116 set_location_assignment PIN_78 -to CON_A[1] 117 set_location_assignment PIN_80 -to CON_A[2] 118 set_location_assignment PIN_81 -to CON_A[3] 119 set_location_assignment PIN_82 -to CON_A[4] 119 120 set_location_assignment PIN_83 -to TRG[0] 120 121 set_location_assignment PIN_84 -to TRG[1] … … 234 235 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_SLWR 235 236 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_IFCLK 237 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to I2C_SDA 238 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to I2C_SCL 236 239 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CON_A[0] 237 240 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CON_A[1] … … 239 242 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CON_A[3] 240 243 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CON_A[4] 241 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CON_A[5]242 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CON_A[6]243 244 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TRG[0] 244 245 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TRG[1] -
trunk/MultiChannelUSB/control.v
r65 r69 4 4 input wire rx_empty, tx_full, 5 5 input wire [7:0] rx_data, 6 6 7 input wire [1:0] mux_max_byte, 7 8 input wire [15:0] mux_min_addr, mux_max_addr, … … 13 14 output wire [1:0] mux_byte, 14 15 output wire [15:0] mux_addr, 16 15 17 output wire rx_rdreq, 16 18 output wire tx_wrreq, 17 19 output wire [7:0] tx_data, 20 18 21 output wire ram_we, 19 22 output wire [19:0] ram_addr, 20 23 inout wire [17:0] ram_data, 24 25 output wire i2c_wrreq, 26 output wire [15:0] i2c_data, 27 input wire i2c_full, 28 21 29 output wire led 22 30 ); … … 33 41 reg int_led; 34 42 43 reg [15:0] int_i2c_data; 44 reg int_i2c_wrreq; 45 35 46 36 47 wire crc_error = 1'b0; … … 39 50 reg [4:0] idle_counter; 40 51 41 reg [ 3:0] state;52 reg [4:0] state; 42 53 43 54 wire [15:0] src, dst; … … 56 67 assign int_ram_q = ram_data; 57 68 // assign ram_data = int_ram_we ? int_ram_data : 18'bz; 58 assign ram_addr = {ram_counter[18:5],1'd0,ram_counter[4:0]}; 69 // assign ram_addr = {ram_counter[18:5],1'd0,ram_counter[4:0]}; 70 assign ram_addr = {1'd0, ram_counter[18:0]}; 59 71 60 72 genvar j; … … 101 113 idle_counter <= 5'd0; 102 114 byte_counter <= 3'd0; 103 state <= 4'd1;115 state <= 5'd1; 104 116 end 105 117 … … 115 127 begin 116 128 int_rdreq <= 1'b0; 117 state <= 4'd2;129 state <= 5'd2; 118 130 end 119 131 end … … 125 137 int_rdreq <= 1'b0; 126 138 crc_reset <= 1'b1; 127 state <= 4'd0;139 state <= 5'd0; 128 140 end 129 141 end … … 140 152 16'h0000: 141 153 begin 142 state <= 4'd0;154 state <= 5'd0; 143 155 end 144 156 … … 148 160 int_chan <= src[1:0]; 149 161 int_reset <= 1'b1; 150 state <= 4'd0;162 state <= 5'd0; 151 163 end 152 164 … … 155 167 int_type <= src[4]; 156 168 int_chan <= src[1:0]; 157 state <= 4'd3;169 state <= 5'd3; 158 170 end 159 171 … … 161 173 begin 162 174 tst_counter <= 11'd0; 163 state <= 4'd6;175 state <= 5'd6; 164 176 end 165 177 16'h0004: … … 168 180 int_ram_data <= 18'd0; 169 181 ram_counter <= 19'd0; 170 state <= 4'd9; 182 state <= 5'd9; 183 end 184 16'h0005: 185 begin 186 int_i2c_data <= src; 187 int_i2c_wrreq <= 1'b1; 188 state <= 5'd15; 171 189 end 172 190 endcase … … 182 200 int_max_byte <= mux_max_byte; 183 201 int_byte <= 2'd0; 184 state <= 4'd4;202 state <= 5'd4; 185 203 end 186 204 … … 188 206 begin 189 207 int_wrreq <= 1'b0; 190 state <= 4'd5;208 state <= 5'd5; 191 209 end 192 210 … … 199 217 if ((int_byte == int_max_byte) && (int_addr == int_max_addr)) 200 218 begin 201 state <= 4'd0;219 state <= 5'd0; 202 220 end 203 221 else 204 222 begin 205 state <= 4'd4;223 state <= 5'd4; 206 224 if (int_byte == int_max_byte) 207 225 begin … … 224 242 int_wrreq <= 1'b1; 225 243 tst_counter <= tst_counter + 11'd1; 226 state <= 4'd7;244 state <= 5'd7; 227 245 end 228 246 7: … … 233 251 if (&tst_counter) 234 252 begin 235 state <= 4'd8;253 state <= 5'd8; 236 254 end 237 255 else … … 246 264 begin 247 265 int_wrreq <= 1'b0; 248 state <= 4'd0;266 state <= 5'd0; 249 267 end 250 268 end … … 253 271 begin 254 272 crc_reset <= 1'b0; 255 state <= 4'd10;273 state <= 5'd10; 256 274 end 257 275 10: … … 261 279 if (&ram_counter) 262 280 begin 263 state <= 4'd11;281 state <= 5'd11; 264 282 end 265 283 else 266 284 begin 267 state <= 4'd9;285 state <= 5'd9; 268 286 ram_counter <= ram_counter + 19'd1; 269 287 end … … 274 292 int_ram_data <= 18'd0; 275 293 ram_counter <= 19'd0; 276 state <= 4'd12;294 state <= 5'd12; 277 295 end 278 296 12: 279 297 begin 280 298 int_wrreq <= 1'b0; 281 state <= 4'd13;299 state <= 5'd13; 282 300 end 283 301 13: 284 302 begin 285 state <= 4'd14;303 state <= 5'd14; 286 304 end 287 305 14: … … 293 311 if (&ram_counter) 294 312 begin 295 state <= 4'd0;313 state <= 5'd0; 296 314 end 297 315 else 298 316 begin 299 state <= 4'd12;317 state <= 5'd12; 300 318 ram_counter <= ram_counter + 19'd1; 301 319 end … … 303 321 end 304 322 323 // i2c write 324 15: 325 begin 326 crc_reset <= 1'b0; 327 if (~i2c_full) 328 begin 329 int_i2c_wrreq <= 1'b0; 330 state <= 5'd0; 331 end 332 end 333 305 334 default: 306 335 begin 307 state <= 4'd0;336 state <= 5'd0; 308 337 end 309 338 endcase … … 318 347 assign tx_wrreq = int_wrreq & (~tx_full); 319 348 assign tx_data = int_data; 349 assign i2c_wrreq = int_i2c_wrreq; 350 assign i2c_data = int_i2c_data; 320 351 assign led = int_led; 321 352
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