Changeset 136 for trunk/FirmwareFX2
- Timestamp:
- Mar 15, 2011, 12:16:01 PM (14 years ago)
- Location:
- trunk/FirmwareFX2
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/FirmwareFX2/dscr.a51
r24 r136 169 169 .db DSCR_ENDPNT_LEN 170 170 .db DSCR_ENDPNT 171 .db 0x 06 ; bEndpointAddress (ep 6 OUT)171 .db 0x86 ; bEndpointAddress (ep 6 IN) 172 172 .db ET_BULK ; bmAttributes 173 173 .db 0x00 ; wMaxPacketSize (LSB) … … 178 178 .db DSCR_ENDPNT_LEN 179 179 .db DSCR_ENDPNT 180 .db 0x 88 ; bEndpointAddress (ep 8 IN)180 .db 0x08 ; bEndpointAddress (ep 8 OUT) 181 181 .db ET_BULK ; bmAttributes 182 182 .db 0x00 ; wMaxPacketSize (LSB) … … 285 285 .db DSCR_ENDPNT_LEN 286 286 .db DSCR_ENDPNT 287 .db 0x 06 ; bEndpointAddress (ep 6 OUT)287 .db 0x86 ; bEndpointAddress (ep 6 IN) 288 288 .db ET_BULK ; bmAttributes 289 289 .db 0x40 ; wMaxPacketSize (LSB) … … 295 295 .db DSCR_ENDPNT_LEN 296 296 .db DSCR_ENDPNT 297 .db 0x 88 ; bEndpointAddress (ep 8 IN)297 .db 0x08 ; bEndpointAddress (ep 8 OUT) 298 298 .db ET_BULK ; bmAttributes 299 299 .db 0x40 ; wMaxPacketSize (LSB) -
trunk/FirmwareFX2/usbjtag.c
r135 r136 107 107 // define endpoint configuration 108 108 109 REVCTL = 3; SYNCDELAY; // Allow FW access to FIFO buffer 110 FIFORESET = 0x80; SYNCDELAY; // From now on, NAK all, reset all FIFOS 111 FIFORESET = 0x02; SYNCDELAY; // Reset FIFO 2 112 FIFORESET = 0x04; SYNCDELAY; // Reset FIFO 4 113 FIFORESET = 0x06; SYNCDELAY; // Reset FIFO 6 114 FIFORESET = 0x08; SYNCDELAY; // Reset FIFO 8 115 FIFORESET = 0x00; SYNCDELAY; // Restore normal behaviour 116 117 EP1OUTCFG = 0xA0; SYNCDELAY; // Endpoint 1 Type Bulk 118 EP1INCFG = 0xA0; SYNCDELAY; // Endpoint 1 Type Bulk 119 120 EP2FIFOCFG = 0x00; SYNCDELAY; // Endpoint 2 121 EP2CFG = 0xA2; SYNCDELAY; // Endpoint 2 Valid, Out, Type Bulk, Double buffered 122 123 EP4FIFOCFG = 0x00; SYNCDELAY; // Endpoint 4 not used 124 EP4CFG = 0xA0; SYNCDELAY; // Endpoint 4 not used 125 126 REVCTL = 0; SYNCDELAY; // Reset FW access to FIFO buffer, enable auto-arming when AUTOOUT is switched to 1 127 128 EP6CFG = 0xA2; SYNCDELAY; // Out endpoint, Bulk, Double buffering 129 EP6FIFOCFG = 0x00; SYNCDELAY; // Firmware has to see a rising edge on auto bit to enable auto arming 130 EP6FIFOCFG = bmAUTOOUT; SYNCDELAY; // Endpoint 6 used for user communicationn, auto commitment, 8 bits data bus 131 132 EP8CFG = 0xE0; SYNCDELAY; // In endpoint, Bulk 133 EP8FIFOCFG = 0x00; SYNCDELAY; // Firmware has to see a rising edge on auto bit to enable auto arming 134 EP8FIFOCFG = bmAUTOIN; SYNCDELAY; // Endpoint 8 used for user communication, auto commitment, 8 bits data bus 135 136 EP8AUTOINLENH = 0x02; SYNCDELAY; // Size in bytes of the IN data automatically commited (512 bytes here, but changed dynamically depending on the connection) 137 EP8AUTOINLENL = 0x00; SYNCDELAY; // Can use signal PKTEND if you want to commit a shorter packet 138 139 // Out endpoints do not come up armed 140 // Since the defaults are double buffered we must write dummy byte counts twice 141 EP2BCL = 0x80; SYNCDELAY; // Arm EP2OUT by writing byte count w/skip. 142 EP4BCL = 0x80; SYNCDELAY; 143 EP2BCL = 0x80; SYNCDELAY; // Arm EP4OUT by writing byte count w/skip. 144 EP4BCL = 0x80; SYNCDELAY; 145 146 PINFLAGSAB = 0xFA; SYNCDELAY; // 1111_1010 => FLAGA = EMPTY flag for EP6; FLAGB = FULL flag for EP8 147 148 // LED turned off by default 149 IOD |= (1 << 4); SYNCDELAY; 150 151 // Put the system in high speed by default (REM: USB-Blaster is in full speed) 152 // This can be changed by vendor commands 153 CT1 &= ~0x02; 109 REVCTL = 0x03; SYNCDELAY; // Allow FW access to FIFO buffer 110 111 EP1OUTCFG = 0xA0; SYNCDELAY; // Endpoint 1 Type Bulk 112 EP1INCFG = 0xA0; SYNCDELAY; // Endpoint 1 Type Bulk 113 114 EP2CFG = 0xA2; SYNCDELAY; // Endpoint 2 ON, OUT, BULK, 512, Buffer 2x 115 EP6CFG = 0xE3; SYNCDELAY; // Endpoint 6 ON, IN, BULK, 512, Buffer 3x 116 EP8CFG = 0xA0; SYNCDELAY; // Endpoint 8 ON, OUT, BULK, 512, Buffer 2x 117 118 EP4CFG = 0x20; SYNCDELAY; // Endpoint 4 OFF, OUT, BULK, 512, Buffer 2x 119 120 FIFORESET = 0x80; SYNCDELAY; // From now on, NAK all 121 FIFORESET = 0x82; SYNCDELAY; // Reset Endpoint 2 FIFO 122 FIFORESET = 0x84; SYNCDELAY; // Reset Endpoint 4 FIFO 123 FIFORESET = 0x86; SYNCDELAY; // Reset Endpoint 6 FIFO 124 FIFORESET = 0x88; SYNCDELAY; // Reset Endpoint 8 FIFO 125 FIFORESET = 0x00; SYNCDELAY; // Restore normal behaviour 126 127 OUTPKTEND = 0x82; SYNCDELAY; // Arm Endpoint 2 buffers to "prime the pump" 128 OUTPKTEND = 0x82; SYNCDELAY; 129 OUTPKTEND = 0x88; SYNCDELAY; // Arm Endpoint 8 buffers to "prime the pump" 130 OUTPKTEND = 0x88; SYNCDELAY; 131 132 REVCTL = 0x00; SYNCDELAY; // Reset FW access to FIFO buffer, enable auto-arming when AUTOOUT is switched to 1 133 134 EP2FIFOCFG = 0x00; SYNCDELAY; 135 EP4FIFOCFG = 0x00; SYNCDELAY; 136 EP6FIFOCFG = bmAUTOIN; SYNCDELAY; 137 EP8FIFOCFG = bmAUTOOUT; SYNCDELAY; 138 139 EP8AUTOINLENH = 0x02; SYNCDELAY; // Auto-commit 512-byte packets 140 EP8AUTOINLENL = 0x00; SYNCDELAY; 141 142 PINFLAGSAB = 0xEB; SYNCDELAY; // 1111_1010 => FLAGA = EMPTY flag for EP6; FLAGB = FULL flag for EP8 143 IOD |= (1 << 4); SYNCDELAY; // LED turned off by default 154 144 } 155 145 -
trunk/FirmwareFX2/usbjtag.hex
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