source:
trunk/MultiChannelUSB@
75
Name | Size | Rev | Age | Author | Last Change |
---|---|---|---|---|---|
../ | |||||
adc_fifo.v | 1.4 KB | 72 | 15 years | testing all components together | |
adc_lvds.v | 1.4 KB | 72 | 15 years | testing all components together | |
adc_para.v | 595 bytes | 60 | 15 years | interface for parallel ADC with unreliable clock | |
adc_pll.v | 5.1 KB | 55 | 15 years | add pll for lvds interface | |
analyser.v | 1.8 KB | 72 | 15 years | testing all components together | |
control.v | 7.0 KB | 72 | 15 years | testing all components together | |
histogram.v | 3.2 KB | 72 | 15 years | testing all components together | |
i2c_fifo.v | 3.1 KB | 71 | 15 years | move to central clock domain | |
oscilloscope.v | 3.8 KB | 72 | 15 years | testing all components together | |
Paella.cof | 436 bytes | 39 | 15 years | add configuration for EPCS16 | |
Paella.dpf | 1.4 KB | 41 | 15 years | add one real ADC channel | |
Paella.qpf | 1.2 KB | 27 | 15 years | initial commit | |
Paella.qsf | 17.9 KB | 72 | 15 years | testing all components together | |
Paella.v | 11.8 KB | 75 | 15 years | fix osc_mux and trg_mux | |
pll.v | 5.1 KB | 27 | 15 years | initial commit | |
test.v | 793 bytes | 59 | 15 years | move control and test code to separate modules | |
test_pll.v | 5.1 KB | 59 | 15 years | move control and test code to separate modules | |
usb_fifo.v | 2.8 KB | 58 | 15 years | code cleanup | |
UserInterface.tcl | 25.0 KB | 74 | 15 years | fix signal shape display configuration | |
uwt_bior31.v | 1.9 KB | 72 | 15 years | testing all components together |
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