source: sandbox/MultiChannelUSB/amplitude.v@ 125

Last change on this file since 125 was 123, checked in by demin, 14 years ago

first more or less working version

File size: 2.2 KB
Line 
1module amplitude
2 #(
3 parameter width = 12 // bit width of the input data
4 )
5 (
6 input wire clock, frame, reset,
7 input wire [width-1:0] cfg_data,
8 input wire [width-1:0] inp_data,
9 output wire [width-1:0] out_data,
10 output wire out_flag
11 );
12
13 reg int_case_reg, int_case_next;
14 reg out_flag_reg, out_flag_next;
15 reg int_flag_reg, int_flag_next;
16 reg [width-1:0] int_mini_reg, int_mini_next;
17 reg [width-1:0] out_data_reg, out_data_next;
18 reg [width-1:0] inp_data_reg, inp_data_next;
19
20 wire int_comp_wire;
21 reg int_comp_reg, int_comp_next;
22
23 assign int_comp_wire = (inp_data_reg < inp_data);
24
25 always @(posedge clock)
26 begin
27 if (reset)
28 begin
29 int_case_reg <= 1'b0;
30 int_mini_reg <= {(width){1'b0}};
31 inp_data_reg <= {(width){1'b0}};
32 out_data_reg <= {(width){1'b0}};
33 out_flag_reg <= 1'b0;
34 int_flag_reg <= 1'b0;
35 int_comp_reg <= 1'b0;
36 end
37 else
38 begin
39 int_case_reg <= int_case_next;
40 int_mini_reg <= int_mini_next;
41 inp_data_reg <= inp_data_next;
42 out_data_reg <= out_data_next;
43 out_flag_reg <= out_flag_next;
44 int_flag_reg <= int_flag_next;
45 int_comp_reg <= int_comp_next;
46 end
47 end
48
49 always @*
50 begin
51 int_case_next = int_case_reg;
52 int_mini_next = int_mini_reg;
53 inp_data_next = inp_data_reg;
54 out_data_next = out_data_reg;
55 out_flag_next = out_flag_reg;
56 int_flag_next = int_flag_reg;
57 int_comp_next = int_comp_reg;
58
59 case (int_case_reg)
60 0:
61 begin
62 if (frame)
63 begin
64 inp_data_next = inp_data;
65 int_comp_next = int_comp_wire;
66 out_data_next = {(width){1'b0}};
67 out_flag_next = 1'b0;
68 // minimum
69 if ((~int_comp_reg) & (int_comp_wire))
70 begin
71 int_mini_next = inp_data_reg;
72 int_flag_next = 1'b1;
73 end
74 // maximum
75 else if ((int_comp_reg) & (~int_comp_wire) & (int_flag_reg))
76 begin
77 out_data_next = inp_data_reg - int_mini_reg;
78 int_flag_next = 1'b0;
79 int_case_next = 1'b1;
80 end
81 end
82 end
83
84 1:
85 begin
86 out_flag_next = (out_data_reg >= cfg_data);
87 int_case_next = 1'b0;
88 end
89
90 endcase
91 end
92
93 assign out_data = out_data_reg;
94 assign out_flag = out_flag_reg;
95
96endmodule
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