Timeline

Dec 24, 2009:

7:29 PM Changeset [89] by demin

remove debug output

7:27 PM Changeset [88] by demin

fix memory read timing

Dec 21, 2009:

11:56 PM Changeset [87] by demin

fix writing of the last EPT sample to SRAM

11:55 PM Changeset [86] by demin

replace 3 ADC FIFO with one large FIFO

5:13 PM Changeset [85] by demin

add possibility to record full EPT information

5:09 PM Changeset [84] by demin

improve timings in all components