Timeline
Dec 24, 2009:
- 7:29 PM Changeset [89] by
- remove debug output
- 7:27 PM Changeset [88] by
- fix memory read timing
Dec 21, 2009:
- 11:56 PM Changeset [87] by
- fix writing of the last EPT sample to SRAM
- 11:55 PM Changeset [86] by
- replace 3 ADC FIFO with one large FIFO
- 5:13 PM Changeset [85] by
- add possibility to record full EPT information
- 5:09 PM Changeset [84] by
- improve timings in all components
Nov 30, 2009:
- 12:51 PM Changeset [83] by
- first working version
- 12:36 PM Changeset [82] by
- several minor fixes
- 12:34 PM Changeset [81] by
- activate all 3 ADC channels
- 12:38 AM Changeset [80] by
- simplify analyser interface
- 12:36 AM Changeset [79] by
- switch from 8 to 4 byte command
- 12:34 AM Changeset [78] by
- make configuration frame always visible
Nov 29, 2009:
- 11:11 PM Changeset [77] by
- add configuration form and activate all channels
Nov 28, 2009:
- 2:12 AM Changeset [76] by
- add counter between peaks
Note:
See TracTimeline
for information about the timeline view.