Changeset 95 for trunk/MultiChannelUSB
- Timestamp:
- Mar 12, 2010, 11:52:01 AM (15 years ago)
- File:
-
- 1 edited
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trunk/MultiChannelUSB/histogram.v
r90 r95 2 2 ( 3 3 input wire clock, frame, reset, 4 5 input wire [40:0] cfg_data,6 4 7 5 input wire hst_good, … … 90 88 int_addr_reg <= 12'd0; 91 89 int_data_reg <= 32'd0; 92 int_case_reg <= 4'b 1;90 int_case_reg <= 4'b0; 93 91 bus_addr_reg <= 13'd0; 94 92 bus_miso_reg <= 16'd0; … … 137 135 138 136 case (int_case_reg) 137 139 138 0: 140 139 begin 141 int_wren_next = 1'b0;142 int_addr_next = 12'd0;143 int_data_next = 32'd0;144 end145 146 1:147 begin148 140 // write zeros 141 int_addr_next = int_addr_reg + 12'd1; 149 142 if (&int_addr_reg) 150 143 begin 151 144 int_wren_next = 1'b0; 152 int_case_next = 4'd2; 153 end 154 else 155 begin 156 int_addr_next = int_addr_reg + 12'd1; 145 int_case_next = 4'd1; 157 146 end 158 147 end 159 148 160 2:149 1: 161 150 begin 162 151 int_wren_next = 1'b0; 152 /* 163 153 if (&int_data_reg) 164 154 begin … … 166 156 end 167 157 else if (frame & hst_good) 158 */ 159 if (frame & hst_good) 168 160 begin 169 161 int_addr_next = hst_data; 170 int_case_next = 4'd 3;162 int_case_next = 4'd2; 171 163 end 164 end 165 166 2: 167 begin 168 int_case_next = 4'd3; 172 169 end 173 170 … … 179 176 4: 180 177 begin 181 int_case_next = 4'd5; 182 end 183 184 5: 185 begin 186 int_wren_next = 1'b1; 187 int_data_next = q_a_wire + 32'd1; 188 int_case_next = 4'd2; 178 int_case_next = 4'd1; 179 if (~&q_a_wire) 180 begin 181 int_wren_next = 1'b1; 182 int_data_next = q_a_wire + 32'd1; 183 end 189 184 end 190 185
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