Index: trunk/MultiChannelUSB/Paella.v
===================================================================
--- trunk/MultiChannelUSB/Paella.v	(revision 81)
+++ trunk/MultiChannelUSB/Paella.v	(revision 84)
@@ -8,5 +8,5 @@
 		inout	wire			I2C_SCL,
 		inout	wire	[4:0]	CON_A,
-		inout	wire	[15:0]	CON_B,
+		input	wire	[15:0]	CON_B,
 		input	wire	[12:0]	CON_C,
 		input	wire	[1:0]	CON_BCLK,
@@ -52,5 +52,5 @@
 	assign	RAM_ADDR	=	20'h00000;
 */
-	assign	RAM_CLK = CLK_50MHz;
+	assign	RAM_CLK = sys_clk;
 	assign	RAM_CE1 = 1'b0;
 
@@ -58,5 +58,4 @@
 	assign	TRG			=	4'bz;
 	assign	CON_A		=	5'bz;
-	assign	CON_B		=	16'bz;
 	assign	USB_PA0		=	1'bz;
 	assign	USB_PA1		=	1'bz;
@@ -95,5 +94,5 @@
 		.usb_addr(usb_addr),
 
-		.clk(CLK_50MHz),
+		.clk(sys_clk),
 		.aclr(usb_aclr),
 
@@ -106,5 +105,5 @@
 		.rx_q(usb_rx_data)
 	);
-	
+		
 	reg 			bln_reset [N-1:0];
 	wire	[11:0]	baseline [N-1:0];
@@ -113,4 +112,5 @@
 	reg 			ana_reset [N-1:0];
 	wire			ana_peak_ready [N-1:0];
+	wire			ana_peak_debug [N-1:0];
 
 	reg				osc_reset [N-1:0];
@@ -155,5 +155,16 @@
     wire	[11:0]	data [N-1:0];
     wire	[11:0]	int_data [N-1:0];
+
+    wire			cmp_data_ready;
+    wire	[11:0]	cmp_data;
+
+    wire			ept_data_ready;
+    wire	[47:0]	ept_data;
     
+	wire	[11:0]	nowhere;
+
+	wire			sys_clk;
+
+
 /*
     assign	osc_thrs[0] = 16'd40;
@@ -176,7 +187,7 @@
 	wire 	[1:0]	uwt_flag3 [N-1:0];
 
-    assign	adc_clk[0] = ADC_FCO;
-    assign	adc_clk[1] = ADC_FCO;
-    assign	adc_clk[2] = ADC_FCO;
+	assign	adc_clk[0] = ADC_FCO;
+	assign	adc_clk[1] = ADC_FCO;
+	assign	adc_clk[2] = ADC_FCO;
 
 /*    
@@ -199,29 +210,14 @@
 		.c0(adc_pll_clk));
 */
-/*
-	wire			tst_adc_clk;
-	wire 	[11:0]	tst_adc_data;
+
+	sys_pll sys_pll_unit(
+		.inclk0(CLK_50MHz),
+		.c0(sys_clk));
 
 	test test_unit(
-		.clk(CLK_50MHz),
-		.tst_clk(tst_adc_clk),
-		.tst_data(tst_adc_data));
-
-    assign	adc_clk[2] = tst_adc_clk;
-    assign	adc_data[2] = tst_adc_data;
-*/
-/*
-	altserial_flash_loader #(
-		.enable_shared_access("OFF"),
-		.enhanced_mode(1),
-		.intended_device_family("Cyclone III")) sfl_unit (
-		.noe(1'b0),
-		.asmi_access_granted(),
-		.asmi_access_request(),
-		.data0out(),
-		.dclkin(),
-		.scein(),
-		.sdoin());
-*/
+		.clk(ADC_FCO),
+		.data(adc_data[2]));
+//		.data(nowhere);
+
 
 	adc_lvds #(
@@ -232,5 +228,6 @@
 		.lvds_fco(ADC_FCO),
 		.lvds_d(ADC_D[2:0]),
-		.adc_data({	adc_data[2],
+//		.adc_data({	adc_data[2],
+		.adc_data({	nowhere,
 					adc_data[1],
 					adc_data[0] }));
@@ -250,5 +247,5 @@
 	integer j;
 
-	always @(posedge CLK_50MHz)
+	always @(posedge sys_clk)
 	begin
 		if (cfg_reset)
@@ -265,4 +262,14 @@
 	end
 
+	assign ept_data_ready = cmp_data_ready & data_ready[2] & data_ready[1] & data_ready[0];
+	assign ept_data = {cmp_data, int_data[2], int_data[1], int_data[0]};
+
+	adc_fifo cmp_fifo_unit (
+		.adc_clk(ADC_FCO),
+		.adc_data(CON_B[11:0]),
+		.clk(sys_clk),
+		.data_ready(cmp_data_ready),
+		.data(cmp_data));
+
 	genvar i;
 
@@ -285,5 +292,5 @@
 				.adc_clk(adc_clk[i]),
 				.adc_data(adc_data[i]),
-				.clk(CLK_50MHz),
+				.clk(sys_clk),
 				.data_ready(data_ready[i]),
 				.data(int_data[i]));
@@ -292,5 +299,5 @@
 
 			uwt_bior31 #(.L(1)) uwt_1_unit (
-				.clk(CLK_50MHz),
+				.clk(sys_clk),
 				.data_ready(data_ready[i]),
 				.x({20'h00000, data[i]}),
@@ -301,5 +308,5 @@
 		
 			uwt_bior31 #(.L(2)) uwt_2_unit (
-				.clk(CLK_50MHz),
+				.clk(sys_clk),
 				.data_ready(data_ready[i]),
 				.x(uwt_a1[i]),
@@ -310,5 +317,5 @@
 		
 			uwt_bior31 #(.L(3)) uwt_3_unit (
-				.clk(CLK_50MHz),
+				.clk(sys_clk),
 				.data_ready(data_ready[i]),
 				.x(uwt_a2[i]),
@@ -319,10 +326,13 @@
 
 			lpm_mux #(
-				.lpm_size(5),
+				.lpm_size(7),
 				.lpm_type("LPM_MUX"),
 				.lpm_width(12),
 				.lpm_widths(3)) osc_mux_unit (
 				.sel(osc_mux_sel[i][2:0]),
-				.data({	bln_baseline[i],
+				.data({	{ana_peak_debug[i], 11'd0},
+						hst_data[i],
+//						uwt_d3[i][11:0],
+						bln_baseline[i],
 						uwt_a3[i][20:9],
 						uwt_a2[i][17:6],
@@ -332,10 +342,13 @@
 
 			lpm_mux #(
-				.lpm_size(5),
+				.lpm_size(7),
 				.lpm_type("LPM_MUX"),
 				.lpm_width(12),
 				.lpm_widths(3)) trg_mux_unit (
 				.sel(trg_mux_sel[i][2:0]),
-				.data({	bln_baseline[i],
+				.data({	{ana_peak_ready[i], 11'd0},
+						hst_data[i],
+//						uwt_d3[i][11:0],
+						bln_baseline[i],
 						uwt_a3[i][20:9],
 						uwt_a2[i][17:6],
@@ -364,5 +377,5 @@
 
 			baseline baseline_unit (
-				.clk(CLK_50MHz),
+				.clk(sys_clk),
 				.reset(bln_reset[i]),
 				.data_ready(data_ready[i]),
@@ -372,15 +385,21 @@
 
 			analyser analyser_unit (
-				.clk(CLK_50MHz),
+				.clk(sys_clk),
 				.reset(ana_reset[i]),
 				.data_ready(data_ready[i]),
 				.uwt_flag(uwt_flag3[i]),
-				.peak_ready(ana_peak_ready[i]));
-
-			assign hst_data[i] = (hst_mux_data[i][12:1] > bln_mux_data[i]) ? (hst_mux_data[i][12:1] - bln_mux_data[i]) : 12'd0;
+				.peak_ready(ana_peak_ready[i]),
+				.peak_debug(ana_peak_debug[i]));
+
+			suppression suppression_unit (
+				.clk(sys_clk),
+				.data(hst_mux_data[i][12:1]),
+				.baseline(bln_mux_data[i]),
+				.result(hst_data[i]));
+
 			assign hst_data_ready[i] = (hst_mux_data[i][0]) & (hst_data[i] >= cfg_hst_threshold[i]);
 
 			histogram #(.W(32)) histogram_unit (
-				.clk(CLK_50MHz),
+				.clk(sys_clk),
 				.reset(hst_reset[i]),
 				.data_ready(hst_data_ready[i]),
@@ -390,5 +409,5 @@
 
 			trigger trigger_unit (
-				.clk(CLK_50MHz),
+				.clk(sys_clk),
 				.reset(trg_reset[i]),
 				.data_ready(data_ready[i]),
@@ -399,5 +418,5 @@
 			
 			oscilloscope oscilloscope_unit (
-				.clk(CLK_50MHz),
+				.clk(sys_clk),
 				.reset(osc_reset[i]),
 				.data_ready(data_ready[i]),
@@ -465,5 +484,5 @@
 
 	i2c_fifo i2c_unit(
-		.clk(CLK_50MHz),
+		.clk(sys_clk),
 		.aclr(i2c_aclr),
 		.wrreq(i2c_wrreq),
@@ -481,5 +500,5 @@
 
 	control control_unit (
-		.clk(CLK_50MHz),
+		.clk(sys_clk),
 		.cfg_reset(cfg_reset),
 		.cfg_src_data(cfg_memory[cfg_src_addr[4:0]]),
@@ -505,4 +524,6 @@
 		.ram_addr(RAM_ADDR),
 		.ram_data({RAM_DQA, RAM_DQAP, RAM_DQB, RAM_DQBP}),
+		.ept_data_ready(ept_data_ready),
+		.ept_data(ept_data),
 		.i2c_wrreq(i2c_wrreq),
 		.i2c_data(i2c_data),
@@ -510,3 +531,17 @@
 		.led(LED));
 
+/*
+	altserial_flash_loader #(
+		.enable_shared_access("OFF"),
+		.enhanced_mode(1),
+		.intended_device_family("Cyclone III")) sfl_unit (
+		.noe(1'b0),
+		.asmi_access_granted(),
+		.asmi_access_request(),
+		.data0out(),
+		.dclkin(),
+		.scein(),
+		.sdoin());
+*/
+
 endmodule
