Index: trunk/MultiChannelUSB/Paella.qsf
===================================================================
--- trunk/MultiChannelUSB/Paella.qsf	(revision 57)
+++ trunk/MultiChannelUSB/Paella.qsf	(revision 58)
@@ -48,15 +48,17 @@
 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
 set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION OFF
+set_global_assignment -name MISC_FILE Paella.dpf
+set_global_assignment -name VERILOG_FILE Paella.v
 set_global_assignment -name VERILOG_FILE adc_fifo.v
 set_global_assignment -name VERILOG_FILE adc_lvds.v
 set_global_assignment -name VERILOG_FILE adc_pll.v
+set_global_assignment -name VERILOG_FILE control.v
 set_global_assignment -name VERILOG_FILE analyser.v
 set_global_assignment -name VERILOG_FILE histogram.v
 set_global_assignment -name VERILOG_FILE oscilloscope.v
-set_global_assignment -name VERILOG_FILE pll.v
 set_global_assignment -name VERILOG_FILE usb_fifo.v
 set_global_assignment -name VERILOG_FILE uwt_bior31.v
-set_global_assignment -name VERILOG_FILE Paella.v
-set_global_assignment -name MISC_FILE Paella.dpf
+set_global_assignment -name VERILOG_FILE test.v
+set_global_assignment -name VERILOG_FILE test_pll.v
 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER OFF
 set_global_assignment -name ENABLE_CLOCK_LATENCY ON
Index: trunk/MultiChannelUSB/adc_fifo.v
===================================================================
--- trunk/MultiChannelUSB/adc_fifo.v	(revision 57)
+++ trunk/MultiChannelUSB/adc_fifo.v	(revision 58)
@@ -4,6 +4,5 @@
 		input	wire	[11:0]	adc_data,
 
-		input	wire			aclr,
-		input	wire			rdclk,
+		input	wire			clk,
 
 		output	wire			ready,
@@ -69,7 +68,7 @@
 		.use_eab("OFF"),
 		.write_aclr_synch("OFF")) fifo_raw (
-		.aclr(aclr),
+		.aclr(1'b0),
 		.data(int_adc_data),
-		.rdclk(rdclk),
+		.rdclk(clk),
 		.rdreq((~int_rdempty) & int_rdreq),
 		.wrclk(adc_clk),
@@ -96,7 +95,7 @@
 		.use_eab("OFF"),
 		.write_aclr_synch("OFF")) fifo_uwt (
-		.aclr(aclr),
+		.aclr(1'b0),
 		.data({uwt_flag3, uwt_peak3[11:0]}),
-		.rdclk(rdclk),
+		.rdclk(clk),
 		.rdreq((~int_rdempty) & int_rdreq),
 		.wrclk(adc_clk),
@@ -110,5 +109,5 @@
 		.wrusedw());
 
-	always @ (posedge rdclk)
+	always @(posedge clk)
 	begin
 		case (state)
Index: trunk/MultiChannelUSB/adc_lvds.v
===================================================================
--- trunk/MultiChannelUSB/adc_lvds.v	(revision 57)
+++ trunk/MultiChannelUSB/adc_lvds.v	(revision 58)
Index: trunk/MultiChannelUSB/usb_fifo.v
===================================================================
--- trunk/MultiChannelUSB/usb_fifo.v	(revision 57)
+++ trunk/MultiChannelUSB/usb_fifo.v	(revision 58)