Index: trunk/MultiChannelUSB/adc_fifo.v
===================================================================
--- trunk/MultiChannelUSB/adc_fifo.v	(revision 48)
+++ trunk/MultiChannelUSB/adc_fifo.v	(revision 49)
@@ -16,4 +16,10 @@
 	wire 	[31:0]	uwt_d3, uwt_a3, uwt_peak3;
 	wire 	[1:0]	uwt_flag1, uwt_flag2, uwt_flag3;
+
+	wire	[11:0]	int_raw_q;
+	wire	[13:0]	int_uwt_q;
+
+	reg		[11:0]	int_raw_data;
+	reg		[13:0]	int_uwt_data;
 
 	wire	[1:0]	wrfull;
@@ -63,8 +69,8 @@
 		.data(adc_data),
 		.rdclk(rdclk),
-		.rdreq(int_rdreq),
+		.rdreq((~int_rdempty) & int_rdreq),
 		.wrclk(adc_clk),
 		.wrreq(~wrfull[0]),
-		.q(raw_data),
+		.q(int_raw_q),
 		.rdempty(int_rdempty),
 		.wrfull(wrfull[0]),
@@ -90,8 +96,8 @@
 		.data({uwt_flag3, uwt_peak3[11:0]}),
 		.rdclk(rdclk),
-		.rdreq(int_rdreq),
+		.rdreq((~int_rdempty) & int_rdreq),
 		.wrclk(adc_clk),
 		.wrreq(~wrfull[1]),
-		.q(uwt_data),
+		.q(int_uwt_q),
 		.rdempty(),
 		.wrfull(wrfull[1]),
@@ -106,24 +112,26 @@
 			1'b0:
 			begin
+				int_rdreq <= 1'b1;
+				int_ready <= 1'b0;
+				state <= 1'b1;
+			end
+
+			1'b1: 
+			begin
 				if (~int_rdempty)
 				begin
-					int_rdreq <= 1'b1;
+					int_raw_data <= int_raw_q;
+					int_uwt_data <= int_uwt_q;
+					int_rdreq <= 1'b0;
 					int_ready <= 1'b1;
-					state <= 1'b1;
+					state <= 1'b0;
 				end
-			end
-
-			1'b1:
-			begin
-				int_rdreq <= 1'b0;
-				int_ready <= 1'b0;
-				state <= 1'b0;
 			end
 
 			default:
 			begin
-				int_rdreq <= 1'b0;
+				int_rdreq <= 1'b1;
 				int_ready <= 1'b0;
-				state <= 1'b0;
+				state <= 1'b1;
 			end
 		endcase
@@ -131,4 +139,6 @@
 	
 	assign	ready = int_ready;
+	assign	raw_data = int_raw_data;
+	assign	uwt_data = int_uwt_data;
 
 endmodule