- Timestamp:
- Mar 25, 2014, 12:44:12 AM (11 years ago)
- Location:
- trunk/3DEES
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/3DEES/Paella.v
r186 r188 292 292 .reset(1'b0), 293 293 // .del_data({6'd0, 6'd32, 6'd32, 6'd32}), 294 .del_data({6'd0, cfg_bits[4 1+6*j][5:0], cfg_bits[39+6*j][5:0], cfg_bits[37+6*j][5:0]}),294 .del_data({6'd0, cfg_bits[43+6*j][5:0], cfg_bits[41+6*j][5:0], cfg_bits[39+6*j][5:0]}), 295 295 .amp_data({6'd0, 6'd20, 6'd20, 6'd20}), 296 296 // .tau_data({16'd0, 16'd19835, 16'd19835, 16'd19835}), 297 297 // exp(-32/1000)*1024*20 298 .tau_data({16'd0, cfg_bits[4 0+6*j], cfg_bits[38+6*j], cfg_bits[36+6*j]}),298 .tau_data({16'd0, cfg_bits[42+6*j], cfg_bits[40+6*j], cfg_bits[38+6*j]}), 299 299 .inp_data({ 300 300 19'd0, cic_data[j*3+2][18:0], cic_data[j*3+1][18:0], cic_data[j*3+0][18:0]}), … … 340 340 // 12'd20, 12'd20, 12'd20, 12'd20, 12'd2000, 12'd20, 341 341 // 12'd20, 12'd2000, 12'd2000, 12'd20, 12'd1000, 12'd1000}), 342 .cfg_data({cfg_bits[3 3][11:0], cfg_bits[32][11:0],342 .cfg_data({cfg_bits[37][11:0], cfg_bits[36][11:0], 343 343 cfg_bits[35][11:0], cfg_bits[34][11:0], cfg_bits[33][11:0], cfg_bits[32][11:0], 344 344 cfg_bits[31][11:0], cfg_bits[30][11:0], cfg_bits[29][11:0], cfg_bits[28][11:0], -
trunk/3DEES/UserInterface.tcl
r186 r188 450 450 set b $decay($i).0 451 451 set value [expr int(exp(-${a}/${b})*1024*20)] 452 append command [format {000200%02x0004%04x} [expr {3 6+ 2 * (${i} - 1)}] $value]452 append command [format {000200%02x0004%04x} [expr {38 + 2 * (${i} - 1)}] $value] 453 453 } 454 454 … … 463 463 set command {} 464 464 for {set i 1} {$i <= 6} {incr i} { 465 append command [format {000200%02x0004%04x} [expr {3 5+ 2 * (${i} - 1)}] $delay($i)]465 append command [format {000200%02x0004%04x} [expr {39 + 2 * (${i} - 1)}] $delay($i)] 466 466 } 467 467 -
trunk/3DEES/classifier.v
r186 r188 13 13 14 14 reg out_flag_reg [2:0], out_flag_next [2:0]; 15 reg [ 7:0] out_data_reg [2:0], out_data_next [2:0];15 reg [10:0] out_data_reg [2:0], out_data_next [2:0]; 16 16 reg [5:0] inp_flag_reg, inp_flag_next; 17 17 reg [width-1:0] inp_data_reg [5:0], inp_data_next [5:0]; … … 69 69 for (i = 0; i < 3; i = i + 1) 70 70 begin 71 out_data_reg[i] <= {( 7){1'b0}};71 out_data_reg[i] <= {(11){1'b0}}; 72 72 out_flag_reg[i] <= 1'b0; 73 73 end … … 153 153 for (i = 0; i < 3; i = i + 1) 154 154 begin 155 out_data_next[i] = {( 7){1'b0}};155 out_data_next[i] = {(11){1'b0}}; 156 156 out_flag_next[i] = 1'b0; 157 157 end … … 165 165 else 166 166 begin 167 out_data_next[0] = {( 7){1'b0}};167 out_data_next[0] = {(11){1'b0}}; 168 168 out_data_next[1] = out_data_reg[0]; 169 out_data_next[2] = out_data_reg[1];169 out_data_next[2] = {3'd0, out_data_reg[1][10:5], 2'd0} + {6'd0, out_data_reg[1][4:0]}; 170 170 171 171 out_flag_next[0] = 1'b1; … … 211 211 case (int_temp_reg[1][3:0]) 212 212 // S1_F, electron 213 4'b0001: out_data_next[0][ 7:5] = 3'b100;213 4'b0001: out_data_next[0][10:5] = 6'b100000; 214 214 215 215 // S1_F, proton 216 4'b0010: out_data_next[0][ 7:5] = 3'b101;216 4'b0010: out_data_next[0][10:5] = 6'b100101; 217 217 218 218 // S1_S, electron 219 4'b0100: out_data_next[0][ 7:5] = 3'b110;219 4'b0100: out_data_next[0][10:5] = 6'b101010; 220 220 221 221 // S1_S, proton 222 4'b1000: out_data_next[0][ 7:5] = 3'b111;222 4'b1000: out_data_next[0][10:5] = 6'b101111; 223 223 224 224 default: out_flag_next[0] = 1'b0; … … 231 231 // assign out_data = {1'd0, int_comp_wire[0], int_temp_reg[1][3:0]}; 232 232 // assign out_data = {1'd0, int_temp_reg[0][4:0]}; 233 assign out_data = out_data_reg[2] ;233 assign out_data = out_data_reg[2][7:0]; 234 234 assign out_flag = out_flag_reg[2]; 235 235 -
trunk/3DEES/histogram32.v
r187 r188 7 7 8 8 input wire bus_ssel, bus_wren, 9 input wire [ 6:0] bus_addr,9 input wire [7:0] bus_addr, 10 10 input wire [15:0] bus_mosi, 11 11
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