Index: trunk/3DEES/Paella.v =================================================================== --- trunk/3DEES/Paella.v (revision 185) +++ trunk/3DEES/Paella.v (revision 186) @@ -94,5 +94,5 @@ wire cls_flag; - wire [6:0] cls_data; + wire [7:0] cls_data; wire [1:0] amp_mux_flag [2:0]; @@ -200,5 +200,5 @@ assign int_mux_data[j] = { {4'd0, cls_flag, 7'd0}, - {5'd0, cls_data}, + {4'd0, cls_data}, {4'd0, amp_flag[j][0], 7'd0}, amp_data[j][11:0], @@ -292,9 +292,9 @@ .reset(1'b0), // .del_data({6'd0, 6'd32, 6'd32, 6'd32}), - .del_data({6'd0, cfg_bits[39+6*j][5:0], cfg_bits[37+6*j][5:0], cfg_bits[35+6*j][5:0]}), + .del_data({6'd0, cfg_bits[41+6*j][5:0], cfg_bits[39+6*j][5:0], cfg_bits[37+6*j][5:0]}), .amp_data({6'd0, 6'd20, 6'd20, 6'd20}), // .tau_data({16'd0, 16'd19835, 16'd19835, 16'd19835}), // exp(-32/1000)*1024*20 - .tau_data({16'd0, cfg_bits[38+6*j], cfg_bits[36+6*j], cfg_bits[34+6*j]}), + .tau_data({16'd0, cfg_bits[40+6*j], cfg_bits[38+6*j], cfg_bits[36+6*j]}), .inp_data({ 19'd0, cic_data[j*3+2][18:0], cic_data[j*3+1][18:0], cic_data[j*3+0][18:0]}), @@ -341,4 +341,5 @@ // 12'd20, 12'd2000, 12'd2000, 12'd20, 12'd1000, 12'd1000}), .cfg_data({cfg_bits[33][11:0], cfg_bits[32][11:0], + cfg_bits[35][11:0], cfg_bits[34][11:0], cfg_bits[33][11:0], cfg_bits[32][11:0], cfg_bits[31][11:0], cfg_bits[30][11:0], cfg_bits[29][11:0], cfg_bits[28][11:0], cfg_bits[27][11:0], cfg_bits[26][11:0], cfg_bits[25][11:0], cfg_bits[24][11:0], @@ -357,8 +358,8 @@ .reset(cfg_bits[0][5]), .hst_good(cls_flag & cfg_bits[6][0]), - .hst_data(cls_data[5:0]), + .hst_data(cls_data[6:0]), .bus_ssel(bus_ssel[2]), .bus_wren(bus_wren), - .bus_addr(bus_addr[6:0]), + .bus_addr(bus_addr[7:0]), .bus_mosi(bus_mosi), .bus_miso(bus_miso[2]), Index: trunk/3DEES/UserInterface.tcl =================================================================== --- trunk/3DEES/UserInterface.tcl (revision 185) +++ trunk/3DEES/UserInterface.tcl (revision 186) @@ -56,16 +56,20 @@ {3_2} 13 {3_3} 14 + {3_4} 15 {4_0} 3 - {4_1} 15 - {4_2} 16 - {4_3} 17 + {4_1} 16 + {4_2} 17 + {4_3} 18 + {4_4} 19 {5_0} 4 - {5_1} 18 - {5_2} 19 - {5_3} 20 + {5_1} 20 + {5_2} 21 + {5_3} 22 + {5_4} 23 {6_0} 5 - {6_1} 21 - {6_2} 22 - {6_3} 23 + {6_1} 24 + {6_2} 25 + {6_3} 26 + {6_4} 27 } # ------------------------------------------------------------------------- @@ -82,22 +86,26 @@ 11 3000 2 10 - 12 31 - 13 52 - 14 79 - 3 60 - 15 135 - 16 171 - 17 233 - 4 249 - 18 348 - 19 495 - 20 693 - 5 505 - 21 606 - 22 707 - 23 808 - } - - + 12 10 + 13 31 + 14 52 + 15 79 + 3 10 + 16 60 + 17 135 + 18 171 + 19 233 + 4 10 + 20 249 + 21 348 + 22 495 + 23 693 + 5 10 + 24 505 + 25 606 + 26 707 + 27 808 + } + + # ------------------------------------------------------------------------- @@ -109,4 +117,5 @@ 3 {af} 4 {bn} + 5 {bf} } @@ -328,5 +337,5 @@ trace add variable [myvar delay] write [myproc delay_update] trace add variable [myvar thrs] write [myproc thrs_update] - + my delay_update my thrs_update @@ -342,4 +351,5 @@ set thrs [frame ${master}.thrs] + set bins [frame ${master}.bins] set clip [frame ${master}.clip] @@ -347,5 +357,5 @@ set column 0 - foreach {input} [list "ADC" "thrs 1" "thrs 2" "thrs 3" "thrs 4"] { + foreach {input} [list "ADC" "e thrs min" "e thrs max" "p thrs min" "p thrs max"] { label ${config(thrs)}.label_${column} -text "${input}" grid ${config(thrs)}.label_${column} -row 0 -column ${column} -sticky ew -padx 5 -pady 7 @@ -353,5 +363,5 @@ } - foreach {ch id} [array get adcCodes] { + foreach {ch id} [array get adcCodes {[1-2]}] { label ${config(thrs)}.chan_${ch} -text "${id} " grid ${config(thrs)}.chan_${ch} -row ${ch} -column 0 -sticky ew -padx 5 -pady 7 @@ -367,4 +377,28 @@ grid $config(thrs) -row 0 -column 0 -sticky news -padx 10 + + set config(bins) [labelframe ${bins}.frame -borderwidth 1 -relief sunken -text {Bins}] + + set column 0 + foreach {input} [list "ADC" "thrs 0" "thrs 1" "thrs 2" "thrs 3" "thrs 4"] { + label ${config(bins)}.label_${column} -text "${input}" + grid ${config(bins)}.label_${column} -row 0 -column ${column} -sticky ew -padx 5 -pady 7 + incr column + } + + foreach {ch id} [array get adcCodes {[3-6]}] { + label ${config(bins)}.chan_${ch} -text "${id} " + grid ${config(bins)}.chan_${ch} -row ${ch} -column 0 -sticky ew -padx 5 -pady 7 + foreach {num} [list 0 1 2 3 4] { + set column [expr {$num + 1}] + set value $cfgCodes(${ch}_${num}) + spinbox ${config(bins)}.bins_${value} -from 0 -to 4095 \ + -increment 10 -width 10 -textvariable [myvar thrs($value)] \ + -validate all -vcmd {::mca::validate 4095 4 %P} + grid ${config(bins)}.bins_${value} -row ${ch} -column ${column} -sticky w -padx 5 -pady 7 + } + } + + grid $config(bins) -row 0 -column 0 -sticky news -padx 10 set config(clip) [labelframe ${clip}.frame -borderwidth 1 -relief sunken -text {Signal clipping}] @@ -392,12 +426,15 @@ grid $config(clip) -row 0 -column 0 -sticky news -padx 10 - grid ${thrs} -row 0 -column 1 -sticky news + grid ${thrs} -row 0 -column 2 -sticky news + grid ${bins} -row 0 -column 1 -sticky news grid ${clip} -row 0 -column 0 -sticky news grid columnconfigure ${master} 0 -weight 1 grid columnconfigure ${master} 1 -weight 1 + grid columnconfigure ${master} 2 -weight 1 grid rowconfigure ${master} 0 -weight 1 grid rowconfigure ${thrs} 0 -weight 0 + grid rowconfigure ${bins} 0 -weight 0 grid rowconfigure ${clip} 0 -weight 0 } @@ -413,5 +450,5 @@ set b $decay($i).0 set value [expr int(exp(-${a}/${b})*1024*20)] - append command [format {000200%02x0004%04x} [expr {34 + 2 * (${i} - 1)}] $value] + append command [format {000200%02x0004%04x} [expr {36 + 2 * (${i} - 1)}] $value] } @@ -440,5 +477,5 @@ set command {} - for {set i 0} {$i <= 23} {incr i} { + for {set i 0} {$i <= 27} {incr i} { append command [format {000200%02x0004%04x} [expr {10 + ${i}}] $thrs($i)] } @@ -639,9 +676,9 @@ my set data {} - vector create [myvar xvec](64) - vector create [myvar yvec](64) - - # fill one vector for the x axis with 64 points - [myvar xvec] seq -0.5 63.5 + vector create [myvar xvec](80) + vector create [myvar yvec](80) + + # fill one vector for the x axis with 80 points + [myvar xvec] seq -0.5 79.5 my setup @@ -684,5 +721,5 @@ $graph grid configure -hide no $graph legend configure -hide yes - $graph axis configure x -min 0 -max 64 + $graph axis configure x -min 0 -max 80 set config [frame ${master}.config -width 170] @@ -845,5 +882,5 @@ my instvar controller config number - set size 64 + set size 80 set prefix [format {%x} [expr {$number + 2}]] @@ -892,5 +929,5 @@ HstDisplay instproc register {} { - my save_data [join [[myvar yvec] range 0 63] \n] + my save_data [join [[myvar yvec] range 0 79] \n] } Index: trunk/3DEES/classifier.v =================================================================== --- trunk/3DEES/classifier.v (revision 185) +++ trunk/3DEES/classifier.v (revision 186) @@ -5,22 +5,22 @@ ( input wire clock, frame, reset, - input wire [18*width-1:0] cfg_data, + input wire [22*width-1:0] cfg_data, input wire [6*width-1:0] inp_data, // {D3, D2, D1, S2, S1_S, S1_F} input wire [5:0] inp_flag, - output wire [6:0] out_data, + output wire [7:0] out_data, output wire out_flag ); reg out_flag_reg [2:0], out_flag_next [2:0]; - reg [6:0] out_data_reg [2:0], out_data_next [2:0]; + reg [7:0] out_data_reg [2:0], out_data_next [2:0]; reg [5:0] inp_flag_reg, inp_flag_next; reg [width-1:0] inp_data_reg [5:0], inp_data_next [5:0]; - reg [15:0] int_pipe_reg [19:0], int_pipe_next [19:0]; - reg [1:0] int_data_reg [3:0], int_data_next [3:0]; + reg [15:0] int_pipe_reg [23:0], int_pipe_next [23:0]; + reg [2:0] int_data_reg [3:0], int_data_next [3:0]; reg [4:0] int_temp_reg [1:0], int_temp_next [1:0]; wire [width-1:0] inp_data_wire [5:0]; wire [3:0] int_pipe_wire [5:0]; - wire [15:0] int_comp_wire; + wire [19:0] int_comp_wire; integer i; @@ -43,7 +43,8 @@ for (j = 0; j < 4; j = j + 1) begin : CLASSIFIER_COMPARTORS - assign int_comp_wire[j*3+0+4] = (inp_data_reg[j+2] > cfg_data[(j*3+0+6)*width+width-1:(j*3+0+6)*width]); - assign int_comp_wire[j*3+1+4] = (inp_data_reg[j+2] > cfg_data[(j*3+1+6)*width+width-1:(j*3+1+6)*width]); - assign int_comp_wire[j*3+2+4] = (inp_data_reg[j+2] > cfg_data[(j*3+2+6)*width+width-1:(j*3+2+6)*width]); + assign int_comp_wire[j*4+0+4] = (inp_data_reg[j+2] > cfg_data[(j*4+0+6)*width+width-1:(j*4+0+6)*width]); + assign int_comp_wire[j*4+1+4] = (inp_data_reg[j+2] > cfg_data[(j*4+1+6)*width+width-1:(j*4+1+6)*width]); + assign int_comp_wire[j*4+2+4] = (inp_data_reg[j+2] > cfg_data[(j*4+2+6)*width+width-1:(j*4+2+6)*width]); + assign int_comp_wire[j*4+3+4] = (inp_data_reg[j+2] > cfg_data[(j*4+3+6)*width+width-1:(j*4+3+6)*width]); end endgenerate @@ -54,8 +55,8 @@ assign int_pipe_wire[0][j] = (|int_pipe_reg[j]); assign int_pipe_wire[1][j] = (|int_pipe_reg[j+4]); - assign int_pipe_wire[j+2][0] = (|int_pipe_reg[j*3+0+8]); - assign int_pipe_wire[j+2][1] = (|int_pipe_reg[j*3+1+8]); - assign int_pipe_wire[j+2][2] = (|int_pipe_reg[j*3+2+8]); - assign int_pipe_wire[j+2][3] = 1'b0; + assign int_pipe_wire[j+2][0] = (|int_pipe_reg[j*4+0+8]); + assign int_pipe_wire[j+2][1] = (|int_pipe_reg[j*4+1+8]); + assign int_pipe_wire[j+2][2] = (|int_pipe_reg[j*4+2+8]); + assign int_pipe_wire[j+2][3] = (|int_pipe_reg[j*4+3+8]); end endgenerate @@ -68,5 +69,5 @@ for (i = 0; i < 3; i = i + 1) begin - out_data_reg[i] <= {(6){1'b0}}; + out_data_reg[i] <= {(7){1'b0}}; out_flag_reg[i] <= 1'b0; end @@ -75,5 +76,5 @@ inp_data_reg[i] <= {(width){1'b0}}; end - for (i = 0; i < 20; i = i + 1) + for (i = 0; i < 24; i = i + 1) begin int_pipe_reg[i] <= {(16){1'b0}}; @@ -81,5 +82,5 @@ for (i = 0; i < 4; i = i + 1) begin - int_data_reg[i] <= {(2){1'b0}}; + int_data_reg[i] <= {(3){1'b0}}; end for (i = 0; i < 2; i = i + 1) @@ -100,5 +101,5 @@ inp_data_reg[i] <= inp_data_next[i]; end - for (i = 0; i < 20; i = i + 1) + for (i = 0; i < 24; i = i + 1) begin int_pipe_reg[i] <= int_pipe_next[i]; @@ -127,5 +128,5 @@ inp_data_next[i] = inp_data_reg[i]; end - for (i = 0; i < 20; i = i + 1) + for (i = 0; i < 24; i = i + 1) begin int_pipe_next[i] = int_pipe_reg[i]; @@ -152,8 +153,8 @@ for (i = 0; i < 3; i = i + 1) begin - out_data_next[i] = {(6){1'b0}}; + out_data_next[i] = {(7){1'b0}}; out_flag_next[i] = 1'b0; end - for (i = 0; i < 20; i = i + 1) + for (i = 0; i < 24; i = i + 1) begin int_pipe_next[i] = {(16){1'b0}}; @@ -164,5 +165,5 @@ else begin - out_data_next[0] = {(6){1'b0}}; + out_data_next[0] = {(7){1'b0}}; out_data_next[1] = out_data_reg[0]; out_data_next[2] = out_data_reg[1]; @@ -172,25 +173,26 @@ out_flag_next[2] = out_flag_reg[1] & (out_data_reg[1] > out_data_reg[0]); + for (i = 0; i < 5; i = i + 1) + begin + int_pipe_next[i] = {int_pipe_reg[i][14:0], int_comp_wire[i]}; + end + for (i = 4; i < 8; i = i + 1) + begin + int_pipe_next[i] = {int_pipe_reg[i][14:0], inp_flag_reg[i-2]}; + end + for (i = 8; i < 24; i = i + 1) + begin + int_pipe_next[i] = {int_pipe_reg[i][14:0], int_comp_wire[i-4]}; + end + for (i = 0; i < 4; i = i + 1) begin - int_pipe_next[i] = {int_pipe_reg[i][14:0], int_comp_wire[i]}; - end - for (i = 4; i < 8; i = i + 1) - begin - int_pipe_next[i] = {int_pipe_reg[i][14:0], inp_flag_reg[i-2]}; - end - for (i = 8; i < 20; i = i + 1) - begin - int_pipe_next[i] = {int_pipe_reg[i][14:0], int_comp_wire[i-4]}; - end - - for (i = 0; i < 4; i = i + 1) - begin - case (int_pipe_wire[i+2][2:0]) - 3'b000: int_data_next[i] = 2'b00; - 3'b001: int_data_next[i] = 2'b01; - 3'b011: int_data_next[i] = 2'b10; - 3'b111: int_data_next[i] = 2'b11; - default: int_data_next[i] = 2'd0; + case (int_pipe_wire[i+2][3:0]) + 4'b0000: int_data_next[i] = 3'b000; + 4'b0001: int_data_next[i] = 3'b001; + 4'b0011: int_data_next[i] = 3'b010; + 4'b0111: int_data_next[i] = 3'b011; + 4'b1111: int_data_next[i] = 3'b100; + default: int_data_next[i] = 3'b000; endcase end @@ -200,8 +202,8 @@ case (int_temp_reg[0][4:0]) - 5'b00011: out_data_next[0][3:0] = {2'b00, int_data_next[0]}; - 5'b00111: out_data_next[0][3:0] = {2'b01, int_data_next[1]}; - 5'b01111: out_data_next[0][3:0] = {2'b10, int_data_next[2]}; - 5'b11111: out_data_next[0][3:0] = {2'b11, int_data_next[3]}; + 5'b00011: out_data_next[0][4:0] = int_data_next[0]; + 5'b00111: out_data_next[0][4:0] = int_data_next[1] + 4'd5; + 5'b01111: out_data_next[0][4:0] = int_data_next[2] + 4'd10; + 5'b11111: out_data_next[0][4:0] = int_data_next[3] + 4'd15; default: out_flag_next[0] = 1'b0; endcase @@ -209,14 +211,14 @@ case (int_temp_reg[1][3:0]) // S1_F, electron - 4'b0001: out_data_next[0][6:4] = 3'b100; + 4'b0001: out_data_next[0][7:5] = 3'b100; // S1_F, proton - 4'b0010: out_data_next[0][6:4] = 3'b101; + 4'b0010: out_data_next[0][7:5] = 3'b101; // S1_S, electron - 4'b0100: out_data_next[0][6:4] = 3'b110; + 4'b0100: out_data_next[0][7:5] = 3'b110; // S1_S, proton - 4'b1000: out_data_next[0][6:4] = 3'b111; + 4'b1000: out_data_next[0][7:5] = 3'b111; default: out_flag_next[0] = 1'b0; Index: trunk/3DEES/histogram32.v =================================================================== --- trunk/3DEES/histogram32.v (revision 185) +++ trunk/3DEES/histogram32.v (revision 186) @@ -4,5 +4,5 @@ input wire hst_good, - input wire [5:0] hst_data, + input wire [6:0] hst_data, input wire bus_ssel, bus_wren, @@ -17,5 +17,5 @@ reg [3:0] int_case_reg, int_case_next; reg int_wren_reg, int_wren_next; - reg [5:0] int_addr_reg, int_addr_next; + reg [6:0] int_addr_reg, int_addr_next; reg [31:0] int_data_reg, int_data_next; @@ -38,6 +38,6 @@ .intended_device_family("Cyclone III"), .lpm_type("altsyncram"), - .numwords_a(64), - .numwords_b(128), + .numwords_a(80), + .numwords_b(160), .operation_mode("BIDIR_DUAL_PORT"), .outdata_aclr_a("NONE"), @@ -49,6 +49,6 @@ .read_during_write_mode_port_a("NEW_DATA_NO_NBE_READ"), .read_during_write_mode_port_b("NEW_DATA_NO_NBE_READ"), - .widthad_a(6), - .widthad_b(7), + .widthad_a(7), + .widthad_b(8), .width_a(32), .width_b(16), @@ -86,5 +86,5 @@ begin int_wren_reg <= 1'b1; - int_addr_reg <= 6'd0; + int_addr_reg <= 7'd0; int_data_reg <= 32'd0; int_case_reg <= 4'b0; @@ -139,5 +139,5 @@ begin // write zeros - int_addr_next = int_addr_reg + 6'd1; + int_addr_next = int_addr_reg + 7'd1; if (&int_addr_reg) begin @@ -187,5 +187,5 @@ begin int_wren_next = 1'b0; - int_addr_next = 6'd0; + int_addr_next = 7'd0; int_data_next = 32'd0; int_case_next = 4'd0;