Index: trunk/3DEES/Paella.v
===================================================================
--- trunk/3DEES/Paella.v	(revision 182)
+++ trunk/3DEES/Paella.v	(revision 183)
@@ -88,5 +88,5 @@
 	wire			trg_flag;
 
-	wire	[4*12-1:0]	int_mux_data [N-1:0];
+	wire	[5*12-1:0]	int_mux_data [N-1:0];
 
 	wire	[1:0]	amp_flag [3*N-1:0];
@@ -121,10 +121,11 @@
 
 	assign	tmp_data	=	12'd0;
+/*
 	assign	sys_clock	=	CLK_100MHz;
-/*
+*/
 	sys_pll sys_pll_unit(
 		.inclk0(CLK_100MHz),
 		.c0(sys_clock));
-*/
+
 /*
 	sys_pll sys_pll_unit(
@@ -152,6 +153,6 @@
 		.adc_frame(sys_frame),
 		.adc_data({
-			adc_data[5], adc_data[3], adc_data[2],      // D3, D1, S2
-			adc_data[4], adc_data[1], adc_data[0]}));   // D2, S1_S, S1_F 
+			adc_data[5], adc_data[3], adc_data[4],      // D3, D1, D2
+			adc_data[2], adc_data[1], adc_data[0]}));   // S2, S1_S, S1_F 
 
 	wire	[15:0]		cfg_bits [63:0];
@@ -198,6 +199,6 @@
 		begin : MUX_DATA
 			assign int_mux_data[j] = {
-//				{6'd0, cls_data},
 //				{4'd0, cls_flag, 7'd0},
+				{6'd0, cls_data},
 				{4'd0, amp_flag[j][0], 7'd0},
 				amp_data[j][11:0],
@@ -211,5 +212,5 @@
 
 	lpm_mux #(
-		.lpm_size(4*6),
+		.lpm_size(5*6),
 		.lpm_type("LPM_MUX"),
 		.lpm_width(12),
@@ -226,5 +227,5 @@
 		
 			lpm_mux #(
-				.lpm_size(4*6),
+				.lpm_size(5*6),
 				.lpm_type("LPM_MUX"),
 				.lpm_width(12),
Index: trunk/3DEES/UserInterface.tcl
===================================================================
--- trunk/3DEES/UserInterface.tcl	(revision 182)
+++ trunk/3DEES/UserInterface.tcl	(revision 183)
@@ -96,8 +96,9 @@
     variable inpCodes
     array set inpCodes {
-        0 {r}
-        1 {c}
-        2 {a}
-        3 {f}
+        0 {rs}
+        1 {cs}
+        2 {av}
+        3 {af}
+        4 {bn}
     }
 
@@ -504,10 +505,10 @@
         trace add variable [myvar polar] write [myproc polar_update]
 
-        $config(1).chan_0_1 select
-        $config(2).chan_0_2 select
-        $config(3).chan_0_3 select
-        $config(4).chan_0_4 select
-        $config(5).chan_0_5 select
-        $config(6).chan_2_1 select
+        $config(1).chan_1_1 select
+        $config(2).chan_1_2 select
+        $config(3).chan_1_3 select
+        $config(4).chan_1_4 select
+        $config(5).chan_1_5 select
+        $config(6).chan_2_4 select
 
         foreach {ch dummy} [array get adcCodes] {
@@ -536,9 +537,8 @@
         foreach {osc title} $oscList {
             set config($osc) [labelframe ${mux}.$osc -borderwidth 1 -relief sunken -text $title]
-            set column 1
             foreach {code input} $inpList {
+                set column [expr {$code + 1}]
                 label $config($osc).input_${input} -text " ${input}"
                 grid $config($osc).input_${input} -row 0 -column ${column} -sticky w
-                incr column
             }
             foreach {ch id} $adcList {
@@ -552,6 +552,6 @@
                 }
             }
-            set column [expr {($osc - 1) % 6}]
-            set row [expr {($osc - 1) / 6}]
+            set column [expr {($osc - 1) % 3}]
+            set row [expr {($osc - 1) / 3}]
             grid $config($osc) -row ${row} -column ${column} -sticky news -padx 10
         }
@@ -559,15 +559,21 @@
         set config(key) [labelframe ${key}.frame -borderwidth 1 -relief sunken -text {legend}]
 
-        label $config(key).r -text "r - raw signal"
-        grid $config(key).r -row 0 -column 0 -sticky news
-
-        label $config(key).f -text "c - filtered and clipped signal"
-        grid $config(key).f -row 0 -column 1 -sticky news
-
-        label $config(key).d -text "a - amplitude"
-        grid $config(key).d -row 0 -column 2 -sticky news
-
-        label $config(key).c -text "f - amplitude flag"
-        grid $config(key).c -row 0 -column 3 -sticky news
+        label $config(key).rs -text "rs - raw signal"
+        grid $config(key).rs -row 0 -column 0 -sticky news
+
+        label $config(key).cs -text "cs - filtered and clipped signal"
+        grid $config(key).cs -row 0 -column 1 -sticky news
+
+        label $config(key).av -text "av - amplitude value"
+        grid $config(key).av -row 0 -column 2 -sticky news
+
+        label $config(key).af -text "af - amplitude flag"
+        grid $config(key).af -row 0 -column 3 -sticky news
+
+        label $config(key).bn -text "bn - bin number"
+        grid $config(key).bn -row 0 -column 4 -sticky news
+
+        label $config(key).bf -text "bf - bin flag"
+        grid $config(key).bf -row 0 -column 5 -sticky news
 
         grid $config(key) -row 0 -column 0 -sticky news -padx 10
@@ -603,4 +609,6 @@
         grid columnconfigure $config(key) 2 -weight 1
         grid columnconfigure $config(key) 3 -weight 1
+        grid columnconfigure $config(key) 4 -weight 1
+        grid columnconfigure $config(key) 5 -weight 1
 
 
@@ -608,7 +616,4 @@
         grid columnconfigure ${mux} 1 -weight 1
         grid columnconfigure ${mux} 2 -weight 1
-        grid columnconfigure ${mux} 3 -weight 1
-        grid columnconfigure ${mux} 4 -weight 1
-        grid columnconfigure ${mux} 5 -weight 1
     }
 
@@ -981,5 +986,5 @@
 
         ${config}.thrs_check select
-        ${config}.thrs_field set 30
+        ${config}.thrs_field set 60
     }
 
Index: trunk/3DEES/classifier.v
===================================================================
--- trunk/3DEES/classifier.v	(revision 182)
+++ trunk/3DEES/classifier.v	(revision 183)
@@ -12,9 +12,9 @@
 	);
 
-	reg					out_flag_reg, out_flag_next;
-	reg		[5:0]		out_data_reg, out_data_next;
+	reg					out_flag_reg [2:0], out_flag_next [2:0];
+	reg		[5:0]		out_data_reg [2:0], out_data_next [2:0];
 	reg		[5:0]		inp_flag_reg, inp_flag_next;
 	reg		[width-1:0]	inp_data_reg [5:0], inp_data_next [5:0];
-	reg		[15:0]		int_pipe_reg [19:0], int_pipe_next [19:0];	
+	reg		[15:0]		int_pipe_reg [19:0], int_pipe_next [19:0];
 	reg		[1:0]		int_data_reg [3:0], int_data_next [3:0];
 	reg		[4:0]		int_temp_reg [1:0], int_temp_next [1:0];
@@ -42,7 +42,7 @@
 			assign int_comp_wire[j*3+1+2] = (inp_data_reg[j+2] > cfg_data[(j*3+1+2)*width+width-1:(j*3+1+2)*width]);
 			assign int_comp_wire[j*3+2+2] = (inp_data_reg[j+2] > cfg_data[(j*3+2+2)*width+width-1:(j*3+2+2)*width]);
-		end                                                                                        
+		end
 	endgenerate
-				
+
 	generate
 		for (j = 0; j < 4; j = j + 1)
@@ -56,5 +56,5 @@
 		end
 	endgenerate
-		
+
 	always @(posedge clock)
 	begin
@@ -62,6 +62,9 @@
 		begin
 			inp_flag_reg <= {(6){1'b0}};
-			out_data_reg <= {(6){1'b0}};
-			out_flag_reg <= 1'b0;
+			for (i = 0; i < 3; i = i + 1)
+			begin
+				out_data_reg[i] <= {(6){1'b0}};
+				out_flag_reg[i] <= 1'b0;
+			end
 			for (i = 0; i < 6; i = i + 1)
 			begin
@@ -84,6 +87,9 @@
 		begin
 			inp_flag_reg <= inp_flag_next;
-			out_data_reg <= out_data_next;
-			out_flag_reg <= out_flag_next;
+			for (i = 0; i < 3; i = i + 1)
+			begin
+				out_data_reg[i] <= out_data_next[i];
+				out_flag_reg[i] <= out_flag_next[i];
+			end
 			for (i = 0; i < 6; i = i + 1)
 			begin
@@ -104,10 +110,13 @@
 		end
 	end
-	
+
 	always @*
 	begin
 		inp_flag_next = inp_flag_reg;
-		out_data_next = out_data_reg;
-		out_flag_next = out_flag_reg;
+		for (i = 0; i < 3; i = i + 1)
+		begin
+			out_data_next[i] = out_data_reg[i];
+			out_flag_next[i] = out_flag_reg[i];
+		end
 		for (i = 0; i < 6; i = i + 1)
 		begin
@@ -134,8 +143,12 @@
 				inp_data_next[i] = inp_data_wire[i];
 			end
-		
-			if (out_flag_reg)
-			begin
-				out_flag_next = 1'b0;
+
+			if (out_flag_reg[2])
+			begin
+				for (i = 0; i < 3; i = i + 1)
+				begin
+					out_data_next[i] = {(6){1'b0}};
+					out_flag_next[i] = 1'b0;
+				end
 				for (i = 0; i < 20; i = i + 1)
 				begin
@@ -144,9 +157,15 @@
 				int_temp_next[0] = {(5){1'b0}};
 				int_temp_next[1] = {(5){1'b0}};
-				out_data_next = {(6){1'b0}};
 			end
 			else
 			begin
-				out_flag_next = 1'b1;
+				out_data_next[0] = {(6){1'b0}};		
+				out_data_next[1] = out_data_reg[0];
+				out_data_next[2] = out_data_reg[1];
+
+				out_flag_next[0] = 1'b1;				
+				out_flag_next[1] = out_flag_reg[0];
+				out_flag_next[2] = out_flag_reg[1] & (out_data_reg[1] > out_data_reg[0]);
+
 				int_pipe_next[0] = {int_pipe_reg[0][14:0], int_comp_wire[0]};
 				int_pipe_next[1] = {int_pipe_reg[1][14:0], int_comp_wire[1]};
@@ -170,30 +189,30 @@
 					endcase
 				end
-				
+
 				int_temp_next[0] = {int_pipe_wire[1], int_pipe_wire[0][3]^int_pipe_wire[0][2]};
 				int_temp_next[1] = {1'b0, int_pipe_wire[0]};
 
 				case (int_temp_reg[0][4:0])
-					5'b00011: out_data_next[3:0] = {2'd0, int_data_next[0]};
-					5'b00111: out_data_next[3:0] = {2'd1, int_data_next[1]};
-					5'b01111: out_data_next[3:0] = {2'd2, int_data_next[2]};
-					5'b11111: out_data_next[3:0] = {2'd3, int_data_next[3]};
-					default: out_flag_next = 1'b0;
+					5'b00011: out_data_next[0][3:0] = {2'd0, int_data_next[0]};
+					5'b00111: out_data_next[0][3:0] = {2'd1, int_data_next[1]};
+					5'b01111: out_data_next[0][3:0] = {2'd2, int_data_next[2]};
+					5'b11111: out_data_next[0][3:0] = {2'd3, int_data_next[3]};
+					default: out_flag_next[0] = 1'b0;
 				endcase
-	
+
 				case (int_temp_reg[1][3:0])
 					// S1_F, electron
-					4'b0100: out_data_next[5:4] = 2'd0;
-										
+					4'b0100: out_data_next[0][5:4] = 2'd0;
+
 					// S1_F, proton
-					4'b0101: out_data_next[5:4] = 2'd1;
-										 
+					4'b0101: out_data_next[0][5:4] = 2'd1;
+
 					// S1_S, electron
-					4'b1000: out_data_next[5:4] = 2'd2;
-										 
+					4'b1000: out_data_next[0][5:4] = 2'd2;
+
 					// S1_S, proton
-					4'b1010: out_data_next[5:4] = 2'd3;
-										 
-					default: out_flag_next = 1'b0;
+					4'b1010: out_data_next[0][5:4] = 2'd3;
+
+					default: out_flag_next[0] = 1'b0;
 				endcase
 			end
@@ -204,6 +223,6 @@
 //	assign out_data = {1'd0, int_comp_wire[0], int_temp_reg[1][3:0]};
 //	assign out_data = {1'd0, int_temp_reg[0][4:0]};
-	assign out_data = out_data_reg;
-	assign out_flag = out_flag_reg;
+	assign out_data = out_data_reg[2];
+	assign out_flag = out_flag_reg[2];
 
 endmodule
