Changeset 148 for sandbox/MultiChannelUSB
- Timestamp:
- May 13, 2011, 6:17:07 PM (13 years ago)
- File:
-
- 1 edited
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sandbox/MultiChannelUSB/adc_lvds.v
r147 r148 18 18 19 19 ); 20 localparam width2 = width + 2; 20 21 21 22 reg state, int_rdreq, adc_frame_reg; … … 24 25 reg [size-1:0] int_data_p, int_data_n; 25 26 26 reg [size*width-1:0] int_data_reg; 27 wire [size*width-1:0] int_data_wire; 27 reg [2:0] int_edge_reg; 28 29 reg [size*width-1:0] int_fifo_reg; 30 wire [size*width-1:0] int_fifo_wire; 31 32 reg [size*width2-1:0] int_data_reg; 33 wire [size*width2-1:0] int_data_wire; 28 34 29 35 wire [size*width-1:0] int_q_wire; … … 40 46 // assign int_data_wire[j*width+width-1:j*width] = {int_data_reg[j*width+width-3:j*width], int_data_p[j], int_data_n[j]}; 41 47 // LSB first 42 assign int_data_wire[j*width+width-1:j*width] = {int_data_n[j], int_data_p[j], int_data_reg[j*width+width-1:j*width+2]}; 48 // assign int_data_wire[j*width+width-1:j*width] = {int_data_n[j], int_data_p[j], int_data_reg[j*width+width-1:j*width+2]}; 49 assign int_data_wire[j*width2+width2-1:j*width2] = {int_data_n[j], int_data_p[j], int_data_reg[j*width2+width2-1:j*width2+2]}; 50 assign int_fifo_wire[j*width+width-1:j*width] = int_data_reg[j*width2+width2-3:j*width2]; 43 51 end 44 52 endgenerate … … 56 64 .underflow_checking("ON"), 57 65 .use_eab("ON")) fifo_unit ( 58 .data(int_data_wire), 66 // .data(int_data_wire), 67 .data(int_fifo_reg), 59 68 .rdclk(clock), 60 69 .rdreq((~int_rdempty) & int_rdreq), … … 102 111 int_data_p <= lvds_d; 103 112 int_data_reg <= int_data_wire; 104 113 int_edge_reg <= {(~int_edge_reg[1]), int_edge_reg[0], lvds_fco}; 114 if (int_edge_reg[1] & int_edge_reg[2]) 115 begin 116 int_fifo_reg <= int_fifo_wire; 117 end 105 118 end 106 119
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