Changeset 147
- Timestamp:
- May 12, 2011, 6:47:25 PM (13 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
sandbox/MultiChannelUSB/adc_lvds.v
r146 r147 18 18 19 19 ); 20 localparam width2 = width + 1;21 20 22 21 reg state, int_rdreq, adc_frame_reg; … … 25 24 reg [size-1:0] int_data_p, int_data_n; 26 25 27 reg [2:0] int_edge_reg; 28 29 reg [size*width-1:0] int_fifo_reg; 30 wire [size*width-1:0] int_fifo_wire; 31 32 reg [size*width2-1:0] int_data_reg; 33 wire [size*width2-1:0] int_data_wire; 26 reg [size*width-1:0] int_data_reg; 27 wire [size*width-1:0] int_data_wire; 34 28 35 29 wire [size*width-1:0] int_q_wire; … … 46 40 // assign int_data_wire[j*width+width-1:j*width] = {int_data_reg[j*width+width-3:j*width], int_data_p[j], int_data_n[j]}; 47 41 // LSB first 48 // assign int_data_wire[j*width+width-1:j*width] = {int_data_n[j], int_data_p[j], int_data_reg[j*width+width-1:j*width+2]}; 49 assign int_data_wire[j*width2+width2-1:j*width2] = {int_data_n[j], int_data_p[j], int_data_reg[j*width2+width2-1:j*width2+2]}; 50 assign int_fifo_wire[j*width+width-1:j*width] = int_data_reg[j*width2+width2-2:j*width2]; 42 assign int_data_wire[j*width+width-1:j*width] = {int_data_n[j], int_data_p[j], int_data_reg[j*width+width-1:j*width+2]}; 51 43 end 52 44 endgenerate … … 64 56 .underflow_checking("ON"), 65 57 .use_eab("ON")) fifo_unit ( 66 // .data(int_data_wire), 67 .data(int_fifo_reg), 58 .data(int_data_wire), 68 59 .rdclk(clock), 69 60 .rdreq((~int_rdempty) & int_rdreq), … … 111 102 int_data_p <= lvds_d; 112 103 int_data_reg <= int_data_wire; 113 int_edge_reg <= {(~int_edge_reg[1]), int_edge_reg[0], lvds_fco}; 114 if (int_edge_reg[1] & int_edge_reg[2]) 115 begin 116 int_fifo_reg <= int_fifo_wire; 117 end 104 118 105 end 119 106
Note:
See TracChangeset
for help on using the changeset viewer.