Changeset 134 for sandbox

Timestamp:

Feb 26, 2011, 9:23:06 AM (14 years ago)

Author:

demin

Message:

fix output assignment

File:

• sandbox/MultiChannelUSB/deconv.v (modified) (5 diffs)

sandbox/MultiChannelUSB/deconv.v

@@ -334 +334 @@
                                 begin
                                         int_addr_next[5:0] = del_addr_reg;
-                                        // register 4th sum
+                                        // register 4th sum and 1st product
                                         acc_data_next[4] = acc_data_wire;
                                         out_data_next[0] = out_data_wire;
@@ -353 +353 @@
                                 amp_data_next = amp_data_wire[1];
 
-                                // register 1st sum
+                                // register 1st sum and 2nd product
                                 acc_data_next[1] = acc_data_wire;
                                 out_data_next[1] = out_data_wire;
@@ -373 +373 @@
                                 amp_data_next = amp_data_wire[2];
                                 
-                                // register 2nd sum
+                                // register 2nd sum and 3rd product
                                 acc_data_next[2] = acc_data_wire;
                                 out_data_next[2] = out_data_wire;
@@ -397 +397 @@
                                 amp_data_next = amp_data_wire[3];
                                 
-                                // register 3rd sum
+                                // register 3rd sum and 4th product
                                 acc_data_next[3] = acc_data_wire;
                                 out_data_next[3] = out_data_wire;
                                              
                                 // register 4th output
-                                out_data_next[4] = out_data_next[0];
+                                out_data_next[4] = out_data_reg[0];
 
                                 int_case_next = 3'd2;
@@ -413 +413 @@
         end
 
-        assign out_data = {out_data_next[3], out_data_reg[2], out_data_reg[1], out_data_reg[4]};
+        assign out_data = {out_data_reg[3], out_data_reg[2], out_data_reg[1], out_data_reg[4]};
 
 endmodule