Changeset 133

Timestamp:

Feb 26, 2011, 9:10:59 AM (14 years ago)

Author:

demin

Message:

reduce multiplier latency

File:

• sandbox/MultiChannelUSB/deconv.v (modified) (7 diffs)

sandbox/MultiChannelUSB/deconv.v

@@ -116 +116 @@
                                 .lpm_representation("SIGNED"),
                                 .lpm_type("LPM_MULT"),
-                                .lpm_pipeline(4),
+                                .lpm_pipeline(3),
                                 .lpm_widtha(width1),
                                 .lpm_widthb(17),
@@ -130 +130 @@
                                 .lpm_representation("UNSIGNED"),
                                 .lpm_type("LPM_MULT"),
-                                .lpm_pipeline(4),
+                                .lpm_pipeline(3),
                                 .lpm_widtha(width2),
                                 .lpm_widthb(6),
@@ -336 +336 @@
                                         // register 4th sum
                                         acc_data_next[4] = acc_data_wire;
-                                        out_data_next[3] = out_data_wire;
+                                        out_data_next[0] = out_data_wire;
                                 end
                         end
@@ -355 +355 @@
                                 // register 1st sum
                                 acc_data_next[1] = acc_data_wire;
-                                out_data_next[0] = out_data_wire;
+                                out_data_next[1] = out_data_wire;
 
                                 int_case_next = 3'd4;
@@ -375 +375 @@
                                 // register 2nd sum
                                 acc_data_next[2] = acc_data_wire;
-                                out_data_next[1] = out_data_wire;
+                                out_data_next[2] = out_data_wire;
                                 
                                 del_addr_next = del_addr_reg + 6'd1;
@@ -399 +399 @@
                                 // register 3rd sum
                                 acc_data_next[3] = acc_data_wire;
-                                out_data_next[2] = out_data_wire;
+                                out_data_next[3] = out_data_wire;
                                              
                                 // register 4th output
-                                out_data_next[4] = out_data_next[3];
+                                out_data_next[4] = out_data_next[0];
 
                                 int_case_next = 3'd2;
@@ -413 +413 @@
         end
 
-        assign out_data = {out_data_next[4], out_data_reg[2], out_data_reg[1], out_data_reg[0]};
+        assign out_data = {out_data_next[3], out_data_reg[2], out_data_reg[1], out_data_reg[4]};
 
 endmodule