Index: /sandbox/MultiChannelUSB/deconv.v
===================================================================
--- /sandbox/MultiChannelUSB/deconv.v	(revision 129)
+++ /sandbox/MultiChannelUSB/deconv.v	(revision 130)
@@ -8,9 +8,9 @@
 	(
 		input	wire						clock, frame, reset,
-		input	wire	[3*size*6-1:0]		del_data,
-		input	wire	[3*size*6-1:0]		amp_data,
-		input	wire	[3*size*16-1:0]		tau_data,
-		input	wire	[3*size*width-1:0]	inp_data,
-		output	wire	[3*size*widthr-1:0]	out_data
+		input	wire	[4*size*6-1:0]		del_data,
+		input	wire	[4*size*6-1:0]		amp_data,
+		input	wire	[4*size*16-1:0]		tau_data,
+		input	wire	[4*size*width-1:0]	inp_data,
+		output	wire	[4*size*widthr-1:0]	out_data
 	);
 
@@ -20,4 +20,5 @@
 
 	reg							int_wren_reg, int_wren_next;
+	reg							int_flag_reg, int_flag_next;
 	reg		[1:0]				int_chan_reg, int_chan_next;
 	reg		[2:0]				int_case_reg, int_case_next;
@@ -28,5 +29,5 @@
 	wire	[7:0]				int_addr_wire;
 
-	reg		[size*widthr-1:0]	out_data_reg [2:0], out_data_next [2:0];
+	reg		[size*widthr-1:0]	out_data_reg [4:0], out_data_next [4:0];
 	wire	[size*widthr-1:0]	out_data_wire;
 
@@ -35,17 +36,17 @@
 	wire	[size*width3-1:0]	mul_data_wire [1:0];
 
-	reg		[size*width2-1:0]	acc_data_reg [3:0], acc_data_next [3:0];
+	reg		[size*width2-1:0]	acc_data_reg [4:0], acc_data_next [4:0];
 	wire	[size*width2-1:0]	acc_data_wire;
 
 	wire	[size*width1-1:0]	sub_data_wire;
 
-	reg		[size*width-1:0]	inp_data_reg [2:0], inp_data_next [2:0];
-	wire	[size*width-1:0]	inp_data_wire [3:0];
+	reg		[size*width-1:0]	inp_data_reg [3:0], inp_data_next [3:0];
+	wire	[size*width-1:0]	inp_data_wire [4:0];
 
 	reg		[size*6-1:0]		amp_data_reg, amp_data_next;
-	wire	[size*6-1:0]		amp_data_wire [2:0];
+	wire	[size*6-1:0]		amp_data_wire [3:0];
 
 	reg		[size*16-1:0]		tau_data_reg, tau_data_next;
-	wire	[size*16-1:0]		tau_data_wire [2:0];
+	wire	[size*16-1:0]		tau_data_wire [3:0];
 
 	integer i;
@@ -55,16 +56,19 @@
 		for (j = 0; j < size; j = j + 1)
 		begin : INT_DATA
-			assign inp_data_wire[0][j*width+width-1:j*width] = inp_data[(3*j+0)*width+width-1:(3*j+0)*width];
-			assign inp_data_wire[1][j*width+width-1:j*width] = inp_data[(3*j+1)*width+width-1:(3*j+1)*width];
-			assign inp_data_wire[2][j*width+width-1:j*width] = inp_data[(3*j+2)*width+width-1:(3*j+2)*width];
-			assign amp_data_wire[0][j*6+6-1:j*6] = amp_data[(3*j+0)*6+6-1:(3*j+0)*6];
-			assign amp_data_wire[1][j*6+6-1:j*6] = amp_data[(3*j+1)*6+6-1:(3*j+1)*6];
-			assign amp_data_wire[2][j*6+6-1:j*6] = amp_data[(3*j+2)*6+6-1:(3*j+2)*6];
-			assign tau_data_wire[0][j*16+16-1:j*16] = tau_data[(3*j+0)*16+16-1:(3*j+0)*16];
-			assign tau_data_wire[1][j*16+16-1:j*16] = tau_data[(3*j+1)*16+16-1:(3*j+1)*16];
-			assign tau_data_wire[2][j*16+16-1:j*16] = tau_data[(3*j+2)*16+16-1:(3*j+2)*16];
+			assign inp_data_wire[0][j*width+width-1:j*width] = inp_data[(4*j+0)*width+width-1:(4*j+0)*width];
+			assign inp_data_wire[1][j*width+width-1:j*width] = inp_data[(4*j+1)*width+width-1:(4*j+1)*width];
+			assign inp_data_wire[2][j*width+width-1:j*width] = inp_data[(4*j+2)*width+width-1:(4*j+2)*width];
+			assign inp_data_wire[3][j*width+width-1:j*width] = inp_data[(4*j+3)*width+width-1:(4*j+3)*width];
+			assign amp_data_wire[0][j*6+6-1:j*6] = amp_data[(4*j+0)*6+6-1:(4*j+0)*6];
+			assign amp_data_wire[1][j*6+6-1:j*6] = amp_data[(4*j+1)*6+6-1:(4*j+1)*6];
+			assign amp_data_wire[2][j*6+6-1:j*6] = amp_data[(4*j+2)*6+6-1:(4*j+2)*6];
+			assign amp_data_wire[3][j*6+6-1:j*6] = amp_data[(4*j+3)*6+6-1:(4*j+3)*6];
+			assign tau_data_wire[0][j*16+16-1:j*16] = tau_data[(4*j+0)*16+16-1:(4*j+0)*16];
+			assign tau_data_wire[1][j*16+16-1:j*16] = tau_data[(4*j+1)*16+16-1:(4*j+1)*16];
+			assign tau_data_wire[2][j*16+16-1:j*16] = tau_data[(4*j+2)*16+16-1:(4*j+2)*16];
+			assign tau_data_wire[3][j*16+16-1:j*16] = tau_data[(4*j+3)*16+16-1:(4*j+3)*16];
                                                                                          
 			lpm_mux #(
-				.lpm_size(3),
+				.lpm_size(4),
 				.lpm_type("LPM_MUX"),
 				.lpm_width(8),
@@ -72,7 +76,8 @@
 				.sel(int_chan_next),
 				.data({
-					2'd2, del_data[(3*j+2)*6+6-1:(3*j+2)*6],
-					2'd1, del_data[(3*j+1)*6+6-1:(3*j+1)*6],
-					2'd0, del_data[(3*j+0)*6+6-1:(3*j+0)*6]}),
+					2'd3, del_data[(4*j+3)*6+6-1:(4*j+3)*6],
+					2'd2, del_data[(4*j+2)*6+6-1:(4*j+2)*6],
+					2'd1, del_data[(4*j+1)*6+6-1:(4*j+1)*6],
+					2'd0, del_data[(4*j+0)*6+6-1:(4*j+0)*6]}),
 				.result(int_addr_wire));
 
@@ -94,5 +99,5 @@
 				.lpm_width(width1)) sub_unit_1 (
 				.dataa({{(width1-width){1'b0}}, inp_data_reg[0][j*width+width-1:j*width]}),
-				.datab({{(width1-width){1'b0}}, inp_data_wire[3][j*width+width-1:j*width]}),
+				.datab({{(width1-width){1'b0}}, inp_data_wire[4][j*width+width-1:j*width]}),
 				.result(sub_data_wire[j*width1+width1-1:j*width1]));
 
@@ -111,5 +116,5 @@
 				.lpm_representation("SIGNED"),
 				.lpm_type("LPM_MULT"),
-				.lpm_pipeline(3),
+				.lpm_pipeline(4),
 				.lpm_widtha(width1),
 				.lpm_widthb(17),
@@ -125,5 +130,5 @@
 				.lpm_representation("UNSIGNED"),
 				.lpm_type("LPM_MULT"),
-				.lpm_pipeline(3),
+				.lpm_pipeline(4),
 				.lpm_widtha(width2),
 				.lpm_widthb(6),
@@ -185,5 +190,5 @@
 		.address_b({int_addr_wire[7:6], del_addr_wire}),
 		.data_a(inp_data_reg[0]),
-		.q_b(inp_data_wire[3]),
+		.q_b(inp_data_wire[4]),
 		.aclr0(1'b0),
 		.aclr1(1'b0),
@@ -209,4 +214,5 @@
         begin
 			int_wren_reg <= 1'b1;
+			int_flag_reg <= 1'b0;
 			int_chan_reg <= 2'd0;
 			int_case_reg <= 3'd0;
@@ -215,12 +221,12 @@
 			amp_data_reg <= 6'd0;
 			tau_data_reg <= 16'd0;
-			for(i = 0; i <= 2; i = i + 1)
+			for(i = 0; i <= 3; i = i + 1)
 			begin
 				inp_data_reg[i] <= {(size*width){1'b0}};
+			end
+			for(i = 0; i <= 4; i = i + 1)
+			begin
+				acc_data_reg[i] <= {(size*width2){1'b0}};
 				out_data_reg[i] <= {(size*widthr){1'b0}};
-			end
-			for(i = 0; i <= 3; i = i + 1)
-			begin
-				acc_data_reg[i] <= {(size*width2){1'b0}};
 			end
 		end
@@ -228,4 +234,5 @@
 		begin
 			int_wren_reg <= int_wren_next;
+			int_flag_reg <= int_flag_next;
 			int_chan_reg <= int_chan_next;
 			int_case_reg <= int_case_next;
@@ -234,12 +241,12 @@
 			amp_data_reg <= amp_data_next;
 			tau_data_reg <= tau_data_next;
-			for(i = 0; i <= 2; i = i + 1)
+			for(i = 0; i <= 3; i = i + 1)
 			begin
 				inp_data_reg[i] <= inp_data_next[i];
+			end                  
+			for(i = 0; i <= 4; i = i + 1)
+			begin
+				acc_data_reg[i] <= acc_data_next[i];
 				out_data_reg[i] <= out_data_next[i];
-			end                  
-			for(i = 0; i <= 3; i = i + 1)
-			begin
-				acc_data_reg[i] <= acc_data_next[i];
 			end                  
 		end             
@@ -249,4 +256,5 @@
 	begin
 		int_wren_next = int_wren_reg;
+		int_flag_next = int_flag_reg;
 		int_chan_next = int_chan_reg;
 		int_case_next = int_case_reg;
@@ -255,12 +263,12 @@
 		amp_data_next = amp_data_reg;
 		tau_data_next = tau_data_reg;
-		for(i = 0; i <= 2; i = i + 1)
+		for(i = 0; i <= 3; i = i + 1)
 		begin
 			inp_data_next[i] = inp_data_reg[i];
-			out_data_next[i] = out_data_reg[i];
 		end                  
-		for(i = 0; i <= 3; i = i + 1)
+		for(i = 0; i <= 4; i = i + 1)
 		begin
 			acc_data_next[i] = acc_data_reg[i];
+			out_data_next[i] = out_data_reg[i];
 		end                  
 
@@ -274,12 +282,12 @@
 				amp_data_next = 6'd0;
 				tau_data_next = 16'd0;
-				for(i = 0; i <= 2; i = i + 1)
+				for(i = 0; i <= 3; i = i + 1)
 				begin
 					inp_data_next[i] = {(size*width){1'b0}};
-					out_data_next[i] = {(size*widthr){1'b0}};
 				end                  
-				for(i = 0; i <= 3; i = i + 1)
+				for(i = 0; i <= 4; i = i + 1)
 				begin
 					acc_data_next[i] = {(size*width2){1'b0}};
+					out_data_next[i] = {(size*widthr){1'b0}};
 				end                  
 
@@ -293,4 +301,5 @@
 				begin
 					int_wren_next = 1'b0;
+					int_flag_next = 1'b0;
 					int_chan_next = 2'd0;
 					int_case_next = 3'd2;
@@ -299,8 +308,8 @@
 			2: // frame
 			begin
+				int_flag_next = 1'b0;
+				int_wren_next = frame;
 				if (frame)
 				begin
-					int_wren_next = 1'b1;
-
 					int_addr_next[7:6] = 2'd0;
 					
@@ -308,7 +317,8 @@
 					int_chan_next = 2'd1;
 
-					// register input data for 2nd and 3rd sums
+					// register input data for 2nd, 3rd and 4th sums
 					inp_data_next[1] = inp_data_wire[1];
 					inp_data_next[2] = inp_data_wire[2];
+					inp_data_next[3] = inp_data_wire[3];
 
 					// prepare registers for 1st sum					
@@ -321,5 +331,11 @@
 					int_case_next = 3'd3;
 				end
-
+				if (int_flag_reg) // register 4th sum
+				begin
+					int_addr_next[5:0] = del_addr_reg;
+					// register 4th sum
+					acc_data_next[4] = acc_data_wire;
+					out_data_next[3] = out_data_wire;
+				end
 			end
 			3:  // 1st sum
@@ -346,4 +362,7 @@
 			begin
 				int_addr_next[7:6] = 2'd2;
+
+				// set read addr for 4th pipeline
+				int_chan_next = 2'd3;
 
 				// prepare registers for 3rd sum	
@@ -364,14 +383,24 @@
 			5:  // 3rd sum
 			begin				
-				int_wren_next = 1'b0;
-
+				int_flag_next = 1'b1;
+
+				int_addr_next[7:6] = 2'd3;
+					
 				// set read addr for 1st pipeline
 				int_chan_next = 2'd0;
 
+				// prepare registers for 4th sum	
+				inp_data_next[0] = inp_data_reg[3];
+				acc_data_next[0] = acc_data_reg[4];
+
+				tau_data_next = tau_data_wire[3];
+				amp_data_next = amp_data_wire[3];
+				
 				// register 3rd sum
 				acc_data_next[3] = acc_data_wire;
 				out_data_next[2] = out_data_wire;
                                              
-				int_addr_next[5:0] = del_addr_reg;
+				// register 4th output
+				out_data_next[4] = out_data_next[3];
 
 				int_case_next = 3'd2;
@@ -384,5 +413,5 @@
 	end
 
-	assign out_data = {out_data_reg[2], out_data_reg[1], out_data_reg[0]};
+	assign out_data = {out_data_next[4], out_data_reg[2], out_data_reg[1], out_data_reg[0]};
 
 endmodule