Index: sandbox/MultiChannelUSB/average.v
===================================================================
--- sandbox/MultiChannelUSB/average.v	(revision 115)
+++ sandbox/MultiChannelUSB/average.v	(revision 116)
@@ -8,9 +8,9 @@
 		input	wire	[3*size*6-1:0]		del_data,
 		input	wire	[3*size*width-1:0]	inp_data,
-		output	wire	[3*size*width1-1:0]	out_data
+		output	wire	[3*size*width2-1:0]	out_data
 	);
 
-
-	localparam	width1	=	width + 6 + 1;
+	localparam	width1	=	width + 1;
+	localparam	width2	=	width + 6 + 1;
 
 	reg							int_wren_reg, int_wren_next;
@@ -23,15 +23,12 @@
 	wire	[7:0]				int_addr_wire;
 
+	reg		[size*width2-1:0]	acc_data_reg [3:0], acc_data_next [3:0];
+	wire	[size*width2-1:0]	acc_data_wire;
+
+	reg		[size*width1-1:0]	sub_data_reg [3:0], sub_data_next [3:0];
+	wire	[size*width1-1:0]	sub_data_wire;
+
 	reg		[size*width-1:0]	inp_data_reg [2:0], inp_data_next [2:0];
 	wire	[size*width-1:0]	inp_data_wire [3:0];
-
-	reg		[size*width1-1:0]	out_data_reg [2:0], out_data_next [2:0];
-	wire	[size*width1-1:0]	out_data_wire;
-
-	reg		[size*width1-1:0]	acc_data_reg [3:0], acc_data_next [3:0];
-	wire	[size*width1-1:0]	acc_data_wire;
-
-	reg		[size*width1-1:0]	sub_data_reg [3:0], sub_data_next [3:0];
-	wire	[size*width1-1:0]	sub_data_wire;
 
 	integer i;
@@ -82,8 +79,8 @@
 				.lpm_representation("SIGNED"),
 				.lpm_type("LPM_ADD_SUB"),
-				.lpm_width(width1)) acc_unit_1 (
-				.dataa({sub_data_reg[0][j*width1+width1-1], {(width1-width1){1'b0}}, sub_data_reg[0][j*width1+width1-2:j*width1]}),
-				.datab(acc_data_reg[0][j*width1+width1-1:j*width1]),
-				.result(acc_data_wire[j*width1+width1-1:j*width1]));
+				.lpm_width(width2)) acc_unit_1 (
+				.dataa({{(width2-width1+1){sub_data_reg[0][j*width1+width1-1]}}, sub_data_reg[0][j*width1+width1-2:j*width1]}),
+				.datab(acc_data_reg[0][j*width2+width2-1:j*width2]),
+				.result(acc_data_wire[j*width2+width2-1:j*width2]));
 
 		end
@@ -147,10 +144,9 @@
 			begin
 				inp_data_reg[i] <= {(size*width){1'b0}};
-				out_data_reg[i] <= {(size*width1){1'b0}};
 			end
 			for(i = 0; i <= 3; i = i + 1)
 			begin
 				sub_data_reg[i] <= {(size*width1){1'b0}};
-				acc_data_reg[i] <= {(size*width1){1'b0}};
+				acc_data_reg[i] <= {(size*width2){1'b0}};
 			end
 		end
@@ -165,5 +161,4 @@
 			begin
 				inp_data_reg[i] <= inp_data_next[i];
-				out_data_reg[i] <= out_data_next[i];
 			end                  
 			for(i = 0; i <= 3; i = i + 1)
@@ -185,5 +180,4 @@
 		begin
 			inp_data_next[i] = inp_data_reg[i];
-			out_data_next[i] = out_data_reg[i];
 		end                  
 		for(i = 0; i <= 3; i = i + 1)
@@ -203,10 +197,9 @@
 				begin
 					inp_data_next[i] = {(size*width){1'b0}};
-					out_data_next[i] = {(size*width1){1'b0}};
 				end                  
 				for(i = 0; i <= 3; i = i + 1)
 				begin
 					sub_data_next[i] = {(size*width1){1'b0}};
-					acc_data_next[i] = {(size*width1){1'b0}};
+					acc_data_next[i] = {(size*width2){1'b0}};
 				end
 
@@ -265,5 +258,4 @@
 				sub_data_next[1] = sub_data_wire;
 				acc_data_next[1] = acc_data_wire;
-				out_data_next[0] = acc_data_wire;
 
 				int_case_next = 3'd4;
@@ -282,5 +274,4 @@
 				sub_data_next[2] = sub_data_wire;
 				acc_data_next[2] = acc_data_wire;
-				out_data_next[1] = acc_data_wire;
 				
 				del_addr_next = del_addr_reg + 6'd1;
@@ -298,5 +289,4 @@
 				sub_data_next[3] = sub_data_wire;
 				acc_data_next[3] = acc_data_wire;
-				out_data_next[2] = acc_data_wire;
                                              
 				int_addr_next[5:0] = del_addr_reg;
@@ -311,5 +301,5 @@
 	end
 
-	assign out_data = {out_data_reg[2], out_data_reg[1], out_data_reg[0]};
+	assign out_data = {acc_data_reg[3], acc_data_reg[2], acc_data_reg[1]};
 
 endmodule
Index: sandbox/MultiChannelUSB/deconv.v
===================================================================
--- sandbox/MultiChannelUSB/deconv.v	(revision 115)
+++ sandbox/MultiChannelUSB/deconv.v	(revision 116)
@@ -10,6 +10,5 @@
 		input	wire	[3*size*16-1:0]		tau_data,
 		input	wire	[3*size*width-1:0]	inp_data,
-		output	wire	[3*size*widthr-1:0]	out_data,
-		output	wire	[3*size*width2-1:0]	acc_data
+		output	wire	[3*size*widthr-1:0]	out_data
 	);
 
@@ -102,6 +101,5 @@
 				.lpm_type("LPM_ADD_SUB"),
 				.lpm_width(width2)) acc_unit_1 (
-				.dataa({sub_data_reg[0][j*width1+width1-1], {(width2-width1){1'b0}}, sub_data_reg[0][j*width1+width1-2:j*width1]}),
-//				.dataa({width2{1'b0}}),
+				.dataa({{(width2-width1+1){sub_data_reg[0][j*width1+width1-1]}}, sub_data_reg[0][j*width1+width1-2:j*width1]}),
 				.datab(acc_data_reg[0][j*width2+width2-1:j*width2]),
 				.result(acc_data_wire[j*width2+width2-1:j*width2]));
@@ -418,6 +416,4 @@
 
 	assign out_data = {out_data_reg[2], out_data_reg[1], out_data_reg[0]};
-	assign acc_data = {acc_data_reg[3], acc_data_reg[2], acc_data_reg[1]};
-//	assign acc_data = {17'd0, del_addr_wire, 17'd0, del_addr_wire, 17'd0, del_addr_wire};
 
 endmodule