source: trunk/MultiChannelUSB/uwt_bior31.v@ 90

Last change on this file since 90 was 90, checked in by demin, 15 years ago

full rewrite

File size: 2.4 KB
Line 
1module uwt_bior31
2 #(
3 parameter L = 1 // transform level
4 )
5 (
6 input wire clock, frame, reset,
7 input wire [31:0] x,
8 output wire [31:0] d,
9 output wire [31:0] a,
10 output wire [31:0] peak,
11 output wire [1:0] flag
12 );
13
14 localparam index1 = 1 << (L - 1);
15 localparam index2 = 2 << (L - 1);
16 localparam index3 = 3 << (L - 1);
17 localparam peak_index = ((index3 + 1) >> 1) + 1;
18 localparam peak_shift = ((L - 1) << 1) + (L - 1);
19 localparam zero = 32'h80000000;
20
21 // Tapped delay line
22 reg [31:0] tap [index3:0];
23
24 reg [31:0] d_reg, d_next;
25 reg [31:0] a_reg, a_next;
26 reg [31:0] peak_reg, peak_next;
27
28 reg [31:0] tmp1_reg, tmp1_next;
29 reg [31:0] tmp2_reg, tmp2_next;
30
31 reg less_reg, less_next;
32 reg more_reg, more_next;
33
34 reg [1:0] flag_reg;
35
36 integer i;
37
38 always @(posedge clock)
39 begin
40 if (reset)
41 begin
42 d_reg <= 0;
43 a_reg <= 0;
44 peak_reg <= 0;
45 flag_reg <= 0;
46 tmp1_reg <= 0;
47 tmp2_reg <= 0;
48 less_reg <= 1'b0;
49 more_reg <= 1'b0;
50
51 for(i = 0; i <= index3; i = i + 1)
52 begin
53 tap[i] <= 0;
54 end
55 end
56 else if (frame)
57 begin
58 d_reg <= d_next;
59 a_reg <= a_next;
60 peak_reg <= peak_next;
61
62 tmp1_reg <= tmp1_next;
63 tmp2_reg <= tmp2_next;
64 less_reg <= less_next;
65 more_reg <= more_next;
66
67 flag_reg[0] <= (more_reg) & (~more_next);
68 flag_reg[1] <= (less_reg) & (~less_next);
69
70 // Tapped delay line: shift one
71 for(i = 0; i < index3; i = i + 1)
72 begin
73 tap[i+1] <= tap[i];
74 end
75
76 // Input in register 0
77 tap[0] <= x;
78 end
79 end
80
81 always @*
82 begin
83 // Compute d and a with the filter coefficients.
84 // The coefficients are [1, 3, -3, -1] and [1, 3, 3, 1]
85
86 tmp1_next = tap[index3] + {tap[index2][30:0], 1'b0} + tap[index2];
87 tmp2_next = {tap[index1][30:0], 1'b0} + tap[index1] + tap[0];
88
89 d_next = zero - tmp1_reg + tmp2_reg;
90 a_next = tmp1_reg + tmp2_reg;
91
92 more_next = (d_reg > zero);
93 less_next = (d_reg < zero);
94
95/*
96 d_next = zero - (tap[index3])
97 - (tap[index2] << 1) - tap[index2]
98 + (tap[index1] << 1) + tap[index1]
99 + (tap[0]);
100
101 a_next = (tap[index3])
102 + {tap[index2] << 1} + tap[index2]
103 + (tap[index1] << 1) + tap[index1]
104 + (tap[0]);
105*/
106 peak_next = (tap[peak_index] >> peak_shift);
107 end
108
109 // output logic
110 assign d = d_reg;
111 assign a = a_reg;
112 assign peak = peak_reg;
113 assign flag = flag_reg;
114
115endmodule
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