source: trunk/MultiChannelUSB/uwt_bior31.v@ 138

Last change on this file since 138 was 92, checked in by demin, 15 years ago

delay result by one more clock

File size: 2.5 KB
RevLine 
[27]1module uwt_bior31
2 #(
3 parameter L = 1 // transform level
4 )
5 (
[90]6 input wire clock, frame, reset,
[27]7 input wire [31:0] x,
8 output wire [31:0] d,
9 output wire [31:0] a,
10 output wire [31:0] peak,
11 output wire [1:0] flag
12 );
13
14 localparam index1 = 1 << (L - 1);
15 localparam index2 = 2 << (L - 1);
16 localparam index3 = 3 << (L - 1);
[92]17 localparam index4 = index3 + 1;
18 localparam peak_index = ((index3 + 1) >> 1) + 2;
[27]19 localparam peak_shift = ((L - 1) << 1) + (L - 1);
20 localparam zero = 32'h80000000;
21
22 // Tapped delay line
[92]23 reg [31:0] tap [index4:0];
[27]24
25 reg [31:0] d_reg, d_next;
26 reg [31:0] a_reg, a_next;
27 reg [31:0] peak_reg, peak_next;
28
[84]29 reg [31:0] tmp1_reg, tmp1_next;
30 reg [31:0] tmp2_reg, tmp2_next;
31
32 reg less_reg, less_next;
33 reg more_reg, more_next;
34
[27]35 reg [1:0] flag_reg;
36
37 integer i;
38
[90]39 always @(posedge clock)
[27]40 begin
41 if (reset)
42 begin
43 d_reg <= 0;
44 a_reg <= 0;
45 peak_reg <= 0;
46 flag_reg <= 0;
[84]47 tmp1_reg <= 0;
48 tmp2_reg <= 0;
49 less_reg <= 1'b0;
50 more_reg <= 1'b0;
[27]51
[92]52 for(i = 0; i <= index4; i = i + 1)
[27]53 begin
54 tap[i] <= 0;
55 end
56 end
[90]57 else if (frame)
[27]58 begin
59 d_reg <= d_next;
60 a_reg <= a_next;
61 peak_reg <= peak_next;
62
[84]63 tmp1_reg <= tmp1_next;
64 tmp2_reg <= tmp2_next;
65 less_reg <= less_next;
66 more_reg <= more_next;
67
68 flag_reg[0] <= (more_reg) & (~more_next);
69 flag_reg[1] <= (less_reg) & (~less_next);
70
[27]71 // Tapped delay line: shift one
[92]72 for(i = 0; i < index4; i = i + 1)
[27]73 begin
74 tap[i+1] <= tap[i];
75 end
76
77 // Input in register 0
78 tap[0] <= x;
79 end
80 end
81
82 always @*
83 begin
84 // Compute d and a with the filter coefficients.
85 // The coefficients are [1, 3, -3, -1] and [1, 3, 3, 1]
86
[84]87 tmp1_next = tap[index3] + {tap[index2][30:0], 1'b0} + tap[index2];
88 tmp2_next = {tap[index1][30:0], 1'b0} + tap[index1] + tap[0];
89
90 d_next = zero - tmp1_reg + tmp2_reg;
91 a_next = tmp1_reg + tmp2_reg;
92
93 more_next = (d_reg > zero);
94 less_next = (d_reg < zero);
95
96/*
[27]97 d_next = zero - (tap[index3])
98 - (tap[index2] << 1) - tap[index2]
99 + (tap[index1] << 1) + tap[index1]
100 + (tap[0]);
101
102 a_next = (tap[index3])
[84]103 + {tap[index2] << 1} + tap[index2]
[27]104 + (tap[index1] << 1) + tap[index1]
105 + (tap[0]);
[84]106*/
[27]107 peak_next = (tap[peak_index] >> peak_shift);
108 end
109
110 // output logic
111 assign d = d_reg;
112 assign a = a_reg;
113 assign peak = peak_reg;
114 assign flag = flag_reg;
115
116endmodule
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