source: trunk/MultiChannelCOM/uart.v@ 58

Last change on this file since 58 was 2, checked in by demin, 15 years ago

first working version

File size: 1.9 KB
Line 
1//Listing 8.4
2module uart
3 #( // Default setting:
4 // 19,200 baud, 8 data bits, 1 stop bit, 2^2 FIFO
5 parameter DBIT = 8, // # data bits
6 SB_TICK = 16, // # ticks for stop bits, 16/24/32
7 // for 1/1.5/2 stop bits
8 DVSR = 163, // baud rate divisor
9 // DVSR = 50M/(16*baud rate)
10 DVSR_BIT = 8, // # bits of DVSR
11 FIFO_W = 2 // # addr bits of FIFO
12 // # words in FIFO=2^FIFO_W
13 )
14 (
15 input wire clk, reset,
16 input wire rd_uart, wr_uart, rx,
17 input wire [7:0] w_data,
18 output wire tx_full, rx_empty, tx,
19 output wire [7:0] r_data
20 );
21
22 // signal declaration
23 wire tick, rx_done_tick, tx_done_tick;
24 wire tx_empty, tx_fifo_not_empty;
25 wire [7:0] tx_fifo_out, rx_data_out;
26
27 // body
28// mod_m_counter #(.M(DVSR), .N(DVSR_BIT)) baud_gen_unit
29// (.clk(clk), .reset(reset), .q(), .max_tick(tick));
30 baud_gen #(.INC(1208), .DIV(2)) baud_gen_unit
31 (.clk(clk), .reset(reset), .max_tick(tick));
32
33 uart_rx #(.DBIT(DBIT), .SB_TICK(SB_TICK)) uart_rx_unit
34 (.clk(clk), .reset(reset), .rx(rx), .s_tick(tick),
35 .rx_done_tick(rx_done_tick), .dout(rx_data_out));
36
37 fifo #(.B(DBIT), .W(FIFO_W)) fifo_rx_unit
38 (.clk(clk), .reset(reset), .rd(rd_uart),
39 .wr(rx_done_tick), .w_data(rx_data_out),
40 .empty(rx_empty), .full(), .r_data(r_data));
41
42 fifo #(.B(DBIT), .W(FIFO_W)) fifo_tx_unit
43 (.clk(clk), .reset(reset), .rd(tx_done_tick),
44 .wr(wr_uart), .w_data(w_data), .empty(tx_empty),
45 .full(tx_full), .r_data(tx_fifo_out));
46
47 uart_tx #(.DBIT(DBIT), .SB_TICK(SB_TICK)) uart_tx_unit
48 (.clk(clk), .reset(reset), .tx_start(tx_fifo_not_empty),
49 .s_tick(tick), .din(tx_fifo_out),
50 .tx_done_tick(tx_done_tick), .tx(tx));
51
52 assign tx_fifo_not_empty = ~tx_empty;
53
54endmodule
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