1 | // megafunction wizard: %RAM: 2-PORT%
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2 | // GENERATION: STANDARD
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3 | // VERSION: WM1.0
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4 | // MODULE: altsyncram
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5 |
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6 | // ============================================================
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7 | // File Name: ram1024x16.v
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8 | // Megafunction Name(s):
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9 | // altsyncram
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10 | //
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11 | // Simulation Library Files(s):
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12 | // altera_mf
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13 | // ============================================================
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14 | // ************************************************************
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15 | // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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16 | //
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17 | // 9.0 Build 132 02/25/2009 SJ Web Edition
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18 | // ************************************************************
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19 |
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20 |
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21 | //Copyright (C) 1991-2009 Altera Corporation
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22 | //Your use of Altera Corporation's design tools, logic functions
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23 | //and other software and tools, and its AMPP partner logic
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24 | //functions, and any output files from any of the foregoing
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25 | //(including device programming or simulation files), and any
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26 | //associated documentation or information are expressly subject
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27 | //to the terms and conditions of the Altera Program License
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28 | //Subscription Agreement, Altera MegaCore Function License
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29 | //Agreement, or other applicable license agreement, including,
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30 | //without limitation, that your use is for the sole purpose of
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31 | //programming logic devices manufactured by Altera and sold by
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32 | //Altera or its authorized distributors. Please refer to the
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33 | //applicable agreement for further details.
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34 |
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35 |
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36 | // synopsys translate_off
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37 | `timescale 1 ps / 1 ps
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38 | // synopsys translate_on
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39 | module ram1024x16 (
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40 | clock,
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41 | data,
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42 | rdaddress,
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43 | wraddress,
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44 | wren,
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45 | q);
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46 |
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47 | input clock;
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48 | input [15:0] data;
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49 | input [9:0] rdaddress;
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50 | input [9:0] wraddress;
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51 | input wren;
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52 | output [15:0] q;
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53 | `ifndef ALTERA_RESERVED_QIS
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54 | // synopsys translate_off
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55 | `endif
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56 | tri1 wren;
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57 | `ifndef ALTERA_RESERVED_QIS
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58 | // synopsys translate_on
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59 | `endif
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60 |
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61 | wire [15:0] sub_wire0;
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62 | wire [15:0] q = sub_wire0[15:0];
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63 |
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64 | altsyncram altsyncram_component (
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65 | .wren_a (wren),
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66 | .clock0 (clock),
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67 | .address_a (wraddress),
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68 | .address_b (rdaddress),
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69 | .data_a (data),
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70 | .q_b (sub_wire0),
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71 | .aclr0 (1'b0),
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72 | .aclr1 (1'b0),
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73 | .addressstall_a (1'b0),
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74 | .addressstall_b (1'b0),
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75 | .byteena_a (1'b1),
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76 | .byteena_b (1'b1),
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77 | .clock1 (1'b1),
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78 | .clocken0 (1'b1),
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79 | .clocken1 (1'b1),
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80 | .clocken2 (1'b1),
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81 | .clocken3 (1'b1),
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82 | .data_b ({16{1'b1}}),
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83 | .eccstatus (),
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84 | .q_a (),
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85 | .rden_a (1'b1),
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86 | .rden_b (1'b1),
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87 | .wren_b (1'b0));
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88 | defparam
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89 | altsyncram_component.address_reg_b = "CLOCK0",
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90 | altsyncram_component.clock_enable_input_a = "BYPASS",
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91 | altsyncram_component.clock_enable_input_b = "BYPASS",
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92 | altsyncram_component.clock_enable_output_a = "BYPASS",
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93 | altsyncram_component.clock_enable_output_b = "BYPASS",
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94 | altsyncram_component.intended_device_family = "Cyclone II",
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95 | altsyncram_component.lpm_type = "altsyncram",
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96 | altsyncram_component.numwords_a = 1024,
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97 | altsyncram_component.numwords_b = 1024,
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98 | altsyncram_component.operation_mode = "DUAL_PORT",
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99 | altsyncram_component.outdata_aclr_b = "NONE",
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100 | altsyncram_component.outdata_reg_b = "UNREGISTERED",
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101 | altsyncram_component.power_up_uninitialized = "FALSE",
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102 | altsyncram_component.read_during_write_mode_mixed_ports = "OLD_DATA",
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103 | altsyncram_component.widthad_a = 10,
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104 | altsyncram_component.widthad_b = 10,
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105 | altsyncram_component.width_a = 16,
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106 | altsyncram_component.width_b = 16,
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107 | altsyncram_component.width_byteena_a = 1;
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108 |
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109 |
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110 | endmodule
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111 |
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112 | // ============================================================
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113 | // CNX file retrieval info
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114 | // ============================================================
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115 | // Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0"
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116 | // Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC "0"
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117 | // Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC "0"
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118 | // Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC "0"
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119 | // Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC "0"
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120 | // Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC "0"
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121 | // Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8"
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122 | // Retrieval info: PRIVATE: BlankMemory NUMERIC "1"
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123 | // Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
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124 | // Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC "0"
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125 | // Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
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126 | // Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC "0"
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127 | // Retrieval info: PRIVATE: CLRdata NUMERIC "0"
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128 | // Retrieval info: PRIVATE: CLRq NUMERIC "0"
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129 | // Retrieval info: PRIVATE: CLRrdaddress NUMERIC "0"
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130 | // Retrieval info: PRIVATE: CLRrren NUMERIC "0"
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131 | // Retrieval info: PRIVATE: CLRwraddress NUMERIC "0"
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132 | // Retrieval info: PRIVATE: CLRwren NUMERIC "0"
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133 | // Retrieval info: PRIVATE: Clock NUMERIC "0"
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134 | // Retrieval info: PRIVATE: Clock_A NUMERIC "0"
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135 | // Retrieval info: PRIVATE: Clock_B NUMERIC "0"
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136 | // Retrieval info: PRIVATE: ECC NUMERIC "0"
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137 | // Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0"
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138 | // Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC "0"
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139 | // Retrieval info: PRIVATE: INDATA_REG_B NUMERIC "0"
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140 | // Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_B"
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141 | // Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0"
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142 | // Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
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143 | // Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0"
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144 | // Retrieval info: PRIVATE: JTAG_ID STRING "NONE"
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145 | // Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
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146 | // Retrieval info: PRIVATE: MEMSIZE NUMERIC "16384"
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147 | // Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC "0"
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148 | // Retrieval info: PRIVATE: MIFfilename STRING ""
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149 | // Retrieval info: PRIVATE: OPERATION_MODE NUMERIC "2"
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150 | // Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC "0"
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151 | // Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC "0"
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152 | // Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
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153 | // Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC "1"
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154 | // Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC "3"
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155 | // Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC "3"
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156 | // Retrieval info: PRIVATE: REGdata NUMERIC "1"
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157 | // Retrieval info: PRIVATE: REGq NUMERIC "1"
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158 | // Retrieval info: PRIVATE: REGrdaddress NUMERIC "1"
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159 | // Retrieval info: PRIVATE: REGrren NUMERIC "1"
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160 | // Retrieval info: PRIVATE: REGwraddress NUMERIC "1"
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161 | // Retrieval info: PRIVATE: REGwren NUMERIC "1"
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162 | // Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
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163 | // Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC "0"
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164 | // Retrieval info: PRIVATE: UseDPRAM NUMERIC "1"
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165 | // Retrieval info: PRIVATE: VarWidth NUMERIC "0"
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166 | // Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC "16"
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167 | // Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC "16"
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168 | // Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC "16"
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169 | // Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC "16"
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170 | // Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC "0"
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171 | // Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC "0"
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172 | // Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC "0"
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173 | // Retrieval info: PRIVATE: enable NUMERIC "0"
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174 | // Retrieval info: PRIVATE: rden NUMERIC "0"
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175 | // Retrieval info: CONSTANT: ADDRESS_REG_B STRING "CLOCK0"
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176 | // Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
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177 | // Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING "BYPASS"
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178 | // Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS"
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179 | // Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING "BYPASS"
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180 | // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
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181 | // Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
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182 | // Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "1024"
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183 | // Retrieval info: CONSTANT: NUMWORDS_B NUMERIC "1024"
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184 | // Retrieval info: CONSTANT: OPERATION_MODE STRING "DUAL_PORT"
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185 | // Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING "NONE"
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186 | // Retrieval info: CONSTANT: OUTDATA_REG_B STRING "UNREGISTERED"
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187 | // Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING "FALSE"
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188 | // Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_MIXED_PORTS STRING "OLD_DATA"
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189 | // Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "10"
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190 | // Retrieval info: CONSTANT: WIDTHAD_B NUMERIC "10"
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191 | // Retrieval info: CONSTANT: WIDTH_A NUMERIC "16"
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192 | // Retrieval info: CONSTANT: WIDTH_B NUMERIC "16"
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193 | // Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1"
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194 | // Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock
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195 | // Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0]
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196 | // Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0]
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197 | // Retrieval info: USED_PORT: rdaddress 0 0 10 0 INPUT NODEFVAL rdaddress[9..0]
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198 | // Retrieval info: USED_PORT: wraddress 0 0 10 0 INPUT NODEFVAL wraddress[9..0]
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199 | // Retrieval info: USED_PORT: wren 0 0 0 0 INPUT VCC wren
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200 | // Retrieval info: CONNECT: @data_a 0 0 16 0 data 0 0 16 0
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201 | // Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0
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202 | // Retrieval info: CONNECT: q 0 0 16 0 @q_b 0 0 16 0
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203 | // Retrieval info: CONNECT: @address_a 0 0 10 0 wraddress 0 0 10 0
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204 | // Retrieval info: CONNECT: @address_b 0 0 10 0 rdaddress 0 0 10 0
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205 | // Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0
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206 | // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
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207 | // Retrieval info: GEN_FILE: TYPE_NORMAL ram1024x16.v TRUE
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208 | // Retrieval info: GEN_FILE: TYPE_NORMAL ram1024x16.inc FALSE
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209 | // Retrieval info: GEN_FILE: TYPE_NORMAL ram1024x16.cmp TRUE
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210 | // Retrieval info: GEN_FILE: TYPE_NORMAL ram1024x16.bsf FALSE
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211 | // Retrieval info: GEN_FILE: TYPE_NORMAL ram1024x16_inst.v FALSE
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212 | // Retrieval info: GEN_FILE: TYPE_NORMAL ram1024x16_bb.v TRUE
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213 | // Retrieval info: GEN_FILE: TYPE_NORMAL ram1024x16_waveforms.html TRUE
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214 | // Retrieval info: GEN_FILE: TYPE_NORMAL ram1024x16_wave*.jpg FALSE
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215 | // Retrieval info: LIB_FILE: altera_mf
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