source: trunk/MultiChannelCOM/fifo32x12.v@ 25

Last change on this file since 25 was 2, checked in by demin, 15 years ago

first working version
File size: 7.1 KB
Line 
1// megafunction wizard: %FIFO%
2// GENERATION: STANDARD
3// VERSION: WM1.0
4// MODULE: dcfifo
5
6// ============================================================
7// File Name: fifo32x12.v
8// Megafunction Name(s):
9// dcfifo
10//
11// Simulation Library Files(s):
12// altera_mf
13// ============================================================
14// ************************************************************
15// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
16//
17// 9.0 Build 132 02/25/2009 SJ Web Edition
18// ************************************************************
19
20
21//Copyright (C) 1991-2009 Altera Corporation
22//Your use of Altera Corporation's design tools, logic functions
23//and other software and tools, and its AMPP partner logic
24//functions, and any output files from any of the foregoing
25//(including device programming or simulation files), and any
26//associated documentation or information are expressly subject
27//to the terms and conditions of the Altera Program License
28//Subscription Agreement, Altera MegaCore Function License
29//Agreement, or other applicable license agreement, including,
30//without limitation, that your use is for the sole purpose of
31//programming logic devices manufactured by Altera and sold by
32//Altera or its authorized distributors. Please refer to the
33//applicable agreement for further details.
34
35
36// synopsys translate_off
37`timescale 1 ps / 1 ps
38// synopsys translate_on
39module fifo32x12 (
40 aclr,
41 data,
42 rdclk,
43 rdreq,
44 wrclk,
45 wrreq,
46 q,
47 rdempty,
48 wrfull);
49
50 input aclr;
51 input [11:0] data;
52 input rdclk;
53 input rdreq;
54 input wrclk;
55 input wrreq;
56 output [11:0] q;
57 output rdempty;
58 output wrfull;
59`ifndef ALTERA_RESERVED_QIS
60// synopsys translate_off
61`endif
62 tri0 aclr;
63`ifndef ALTERA_RESERVED_QIS
64// synopsys translate_on
65`endif
66
67 wire sub_wire0;
68 wire sub_wire1;
69 wire [11:0] sub_wire2;
70 wire rdempty = sub_wire0;
71 wire wrfull = sub_wire1;
72 wire [11:0] q = sub_wire2[11:0];
73
74 dcfifo dcfifo_component (
75 .wrclk (wrclk),
76 .rdreq (rdreq),
77 .aclr (aclr),
78 .rdclk (rdclk),
79 .wrreq (wrreq),
80 .data (data),
81 .rdempty (sub_wire0),
82 .wrfull (sub_wire1),
83 .q (sub_wire2)
84 // synopsys translate_off
85 ,
86 .rdfull (),
87 .rdusedw (),
88 .wrempty (),
89 .wrusedw ()
90 // synopsys translate_on
91 );
92 defparam
93 dcfifo_component.intended_device_family = "Cyclone II",
94 dcfifo_component.lpm_numwords = 32,
95 dcfifo_component.lpm_showahead = "ON",
96 dcfifo_component.lpm_type = "dcfifo",
97 dcfifo_component.lpm_width = 12,
98 dcfifo_component.lpm_widthu = 5,
99 dcfifo_component.overflow_checking = "ON",
100 dcfifo_component.rdsync_delaypipe = 4,
101 dcfifo_component.underflow_checking = "ON",
102 dcfifo_component.use_eab = "ON",
103 dcfifo_component.write_aclr_synch = "OFF",
104 dcfifo_component.wrsync_delaypipe = 4;
105
106
107endmodule
108
109// ============================================================
110// CNX file retrieval info
111// ============================================================
112// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0"
113// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1"
114// Retrieval info: PRIVATE: AlmostFull NUMERIC "0"
115// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1"
116// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"
117// Retrieval info: PRIVATE: Clock NUMERIC "4"
118// Retrieval info: PRIVATE: Depth NUMERIC "32"
119// Retrieval info: PRIVATE: Empty NUMERIC "1"
120// Retrieval info: PRIVATE: Full NUMERIC "1"
121// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
122// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0"
123// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "0"
124// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0"
125// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0"
126// Retrieval info: PRIVATE: Optimize NUMERIC "0"
127// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
128// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
129// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"
130// Retrieval info: PRIVATE: UsedW NUMERIC "1"
131// Retrieval info: PRIVATE: Width NUMERIC "12"
132// Retrieval info: PRIVATE: dc_aclr NUMERIC "1"
133// Retrieval info: PRIVATE: diff_widths NUMERIC "0"
134// Retrieval info: PRIVATE: msb_usedw NUMERIC "0"
135// Retrieval info: PRIVATE: output_width NUMERIC "12"
136// Retrieval info: PRIVATE: rsEmpty NUMERIC "1"
137// Retrieval info: PRIVATE: rsFull NUMERIC "0"
138// Retrieval info: PRIVATE: rsUsedW NUMERIC "0"
139// Retrieval info: PRIVATE: sc_aclr NUMERIC "0"
140// Retrieval info: PRIVATE: sc_sclr NUMERIC "0"
141// Retrieval info: PRIVATE: wsEmpty NUMERIC "0"
142// Retrieval info: PRIVATE: wsFull NUMERIC "1"
143// Retrieval info: PRIVATE: wsUsedW NUMERIC "0"
144// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
145// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "32"
146// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "ON"
147// Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo"
148// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "12"
149// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "5"
150// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"
151// Retrieval info: CONSTANT: RDSYNC_DELAYPIPE NUMERIC "4"
152// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"
153// Retrieval info: CONSTANT: USE_EAB STRING "ON"
154// Retrieval info: CONSTANT: WRITE_ACLR_SYNCH STRING "OFF"
155// Retrieval info: CONSTANT: WRSYNC_DELAYPIPE NUMERIC "4"
156// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND aclr
157// Retrieval info: USED_PORT: data 0 0 12 0 INPUT NODEFVAL data[11..0]
158// Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL q[11..0]
159// Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL rdclk
160// Retrieval info: USED_PORT: rdempty 0 0 0 0 OUTPUT NODEFVAL rdempty
161// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq
162// Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL wrclk
163// Retrieval info: USED_PORT: wrfull 0 0 0 0 OUTPUT NODEFVAL wrfull
164// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq
165// Retrieval info: CONNECT: @data 0 0 12 0 data 0 0 12 0
166// Retrieval info: CONNECT: q 0 0 12 0 @q 0 0 12 0
167// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0
168// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0
169// Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0
170// Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0
171// Retrieval info: CONNECT: rdempty 0 0 0 0 @rdempty 0 0 0 0
172// Retrieval info: CONNECT: wrfull 0 0 0 0 @wrfull 0 0 0 0
173// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0
174// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
175// Retrieval info: GEN_FILE: TYPE_NORMAL fifo32x12.v TRUE
176// Retrieval info: GEN_FILE: TYPE_NORMAL fifo32x12.inc FALSE
177// Retrieval info: GEN_FILE: TYPE_NORMAL fifo32x12.cmp TRUE
178// Retrieval info: GEN_FILE: TYPE_NORMAL fifo32x12.bsf FALSE
179// Retrieval info: GEN_FILE: TYPE_NORMAL fifo32x12_inst.v FALSE
180// Retrieval info: GEN_FILE: TYPE_NORMAL fifo32x12_bb.v TRUE
181// Retrieval info: GEN_FILE: TYPE_NORMAL fifo32x12_waveforms.html TRUE
182// Retrieval info: GEN_FILE: TYPE_NORMAL fifo32x12_wave*.jpg FALSE
183// Retrieval info: LIB_FILE: altera_mf
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