1 | /*-----------------------------------------------------------------------------
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2 | * Code that turns a Cypress FX2 USB Controller into an USB JTAG adapter
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3 | *-----------------------------------------------------------------------------
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4 | * Copyright (C) 2005..2007 Kolja Waschk, ixo.de
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5 | *-----------------------------------------------------------------------------
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6 | * Check hardware.h/.c if it matches your hardware configuration (e.g. pinout).
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7 | * Changes regarding USB identification should be made in product.inc!
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8 | *-----------------------------------------------------------------------------
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9 | * This code is part of usbjtag. usbjtag is free software; you can redistribute
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10 | * it and/or modify it under the terms of the GNU General Public License as
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11 | * published by the Free Software Foundation; either version 2 of the License,
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12 | * or (at your option) any later version. usbjtag is distributed in the hope
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13 | * that it will be useful, but WITHOUT ANY WARRANTY; without even the implied
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14 | * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 | * GNU General Public License for more details. You should have received a
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16 | * copy of the GNU General Public License along with this program in the file
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17 | * COPYING; if not, write to the Free Software Foundation, Inc., 51 Franklin
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18 | * St, Fifth Floor, Boston, MA 02110-1301 USA
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19 | *-----------------------------------------------------------------------------
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20 | */
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21 |
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22 | #include "isr.h"
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23 | #include "timer.h"
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24 | #include "delay.h"
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25 | #include "fx2regs.h"
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26 | #include "fx2utils.h"
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27 | #include "usb_common.h"
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28 | #include "usb_descriptors.h"
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29 | #include "usb_requests.h"
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30 |
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31 | #include "syncdelay.h"
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32 |
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33 | #include "eeprom.h"
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34 | #include "hardware.h"
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35 |
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36 | #include "spi.h"
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37 |
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38 | //-----------------------------------------------------------------------------
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39 | // Define USE_MOD256_OUTBUFFER:
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40 | // Saves about 256 bytes in code size, improves speed a little.
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41 | // A further optimization could be not to use an extra output buffer at
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42 | // all, but to write directly into EP1INBUF. Not implemented yet. When
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43 | // downloading large amounts of data _to_ the target, there is no output
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44 | // and thus the output buffer isn't used at all and doesn't slow down things.
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45 |
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46 | #define USE_MOD256_OUTBUFFER 1
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47 |
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48 | //-----------------------------------------------------------------------------
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49 | // Global data
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50 |
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51 | typedef bit BOOL;
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52 | #define FALSE 0
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53 | #define TRUE 1
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54 | static BOOL Running;
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55 | static BOOL WriteOnly;
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56 |
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57 | static BYTE ClockBytes;
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58 | static WORD Pending;
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59 |
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60 | #ifdef USE_MOD256_OUTBUFFER
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61 | static BYTE FirstDataInOutBuffer;
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62 | static BYTE FirstFreeInOutBuffer;
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63 | #else
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64 | static WORD FirstDataInOutBuffer;
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65 | static WORD FirstFreeInOutBuffer;
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66 | #endif
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67 |
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68 | #ifdef USE_MOD256_OUTBUFFER
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69 | /* Size of output buffer must be exactly 256 */
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70 | #define OUTBUFFER_LEN 0x100
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71 | /* Output buffer must begin at some address with lower 8 bits all zero */
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72 | xdata at 0xE000 BYTE OutBuffer[OUTBUFFER_LEN];
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73 | #else
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74 | #define OUTBUFFER_LEN 0x200
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75 | static xdata BYTE OutBuffer[OUTBUFFER_LEN];
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76 | #endif
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77 |
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78 | //-----------------------------------------------------------------------------
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79 |
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80 | void usb_jtag_init(void) // Called once at startup
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81 | {
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82 | WORD tmp;
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83 |
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84 | Running = FALSE;
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85 | ClockBytes = 0;
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86 | Pending = 0;
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87 | WriteOnly = TRUE;
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88 | FirstDataInOutBuffer = 0;
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89 | FirstFreeInOutBuffer = 0;
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90 |
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91 | ProgIO_Init();
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92 |
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93 | ProgIO_Enable();
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94 |
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95 | // Make Timer2 reload at 100 Hz to trigger Keepalive packets
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96 |
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97 | tmp = 65536 - ( 48000000 / 12 / 100 );
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98 | RCAP2H = tmp >> 8;
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99 | RCAP2L = tmp & 0xFF;
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100 | CKCON = 0; // Default Clock
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101 | T2CON = 0x04; // Auto-reload mode using internal clock, no baud clock.
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102 |
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103 | // Enable Autopointer
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104 |
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105 | EXTACC = 1; // Enable
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106 | APTR1FZ = 1; // Don't freeze
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107 | APTR2FZ = 1; // Don't freeze
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108 |
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109 | // define endpoint configuration
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110 |
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111 | REVCTL = 3; SYNCDELAY; // Allow FW access to FIFO buffer
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112 | FIFORESET = 0x80; SYNCDELAY; // From now on, NAK all, reset all FIFOS
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113 | FIFORESET = 0x02; SYNCDELAY; // Reset FIFO 2
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114 | FIFORESET = 0x04; SYNCDELAY; // Reset FIFO 4
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115 | FIFORESET = 0x06; SYNCDELAY; // Reset FIFO 6
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116 | FIFORESET = 0x08; SYNCDELAY; // Reset FIFO 8
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117 | FIFORESET = 0x00; SYNCDELAY; // Restore normal behaviour
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118 |
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119 | EP1OUTCFG = 0xA0; SYNCDELAY; // Endpoint 1 Type Bulk
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120 | EP1INCFG = 0xA0; SYNCDELAY; // Endpoint 1 Type Bulk
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121 |
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122 | EP2FIFOCFG = 0x00; SYNCDELAY; // Endpoint 2
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123 | EP2CFG = 0xA2; SYNCDELAY; // Endpoint 2 Valid, Out, Type Bulk, Double buffered
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124 |
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125 | EP4FIFOCFG = 0x00; SYNCDELAY; // Endpoint 4 not used
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126 | EP4CFG = 0xA0; SYNCDELAY; // Endpoint 4 not used
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127 |
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128 | REVCTL = 0; SYNCDELAY; // Reset FW access to FIFO buffer, enable auto-arming when AUTOOUT is switched to 1
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129 |
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130 | EP6CFG = 0xA2; SYNCDELAY; // Out endpoint, Bulk, Double buffering
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131 | EP6FIFOCFG = 0x00; SYNCDELAY; // Firmware has to see a rising edge on auto bit to enable auto arming
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132 | EP6FIFOCFG = bmAUTOOUT; SYNCDELAY; // Endpoint 6 used for user communicationn, auto commitment, 8 bits data bus
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133 |
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134 | EP8CFG = 0xE0; SYNCDELAY; // In endpoint, Bulk
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135 | EP8FIFOCFG = 0x00; SYNCDELAY; // Firmware has to see a rising edge on auto bit to enable auto arming
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136 | EP8FIFOCFG = bmAUTOIN; SYNCDELAY; // Endpoint 8 used for user communication, auto commitment, 8 bits data bus
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137 |
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138 | EP8AUTOINLENH = 0x00; SYNCDELAY; // Size in bytes of the IN data automatically commited (64 bytes here, but changed dynamically depending on the connection)
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139 | EP8AUTOINLENL = 0x40; SYNCDELAY; // Can use signal PKTEND if you want to commit a shorter packet
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140 |
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141 | // Out endpoints do not come up armed
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142 | // Since the defaults are double buffered we must write dummy byte counts twice
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143 | EP2BCL = 0x80; SYNCDELAY; // Arm EP2OUT by writing byte count w/skip.=
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144 | EP4BCL = 0x80; SYNCDELAY;
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145 | EP2BCL = 0x80; SYNCDELAY; // Arm EP4OUT by writing byte count w/skip.=
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146 | EP4BCL = 0x80; SYNCDELAY;
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147 |
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148 | PINFLAGSAB = 0xEB; SYNCDELAY; // 1110_1011 => FLAGA = EMPTY flag for EP8; FLAGB = FULL flag for EP6
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149 |
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150 | // Put the system in high speed by default (REM: USB-Blaster is in full speed)
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151 | // This can be changed by vendor commands
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152 | CT1 &= ~0x02;
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153 | }
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154 |
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155 | void OutputByte(BYTE d)
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156 | {
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157 | #ifdef USE_MOD256_OUTBUFFER
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158 | OutBuffer[FirstFreeInOutBuffer] = d;
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159 | FirstFreeInOutBuffer = ( FirstFreeInOutBuffer + 1 ) & 0xFF;
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160 | #else
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161 | OutBuffer[FirstFreeInOutBuffer++] = d;
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162 | if(FirstFreeInOutBuffer >= OUTBUFFER_LEN) FirstFreeInOutBuffer = 0;
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163 | #endif
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164 | Pending++;
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165 | }
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166 |
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167 | //-----------------------------------------------------------------------------
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168 | // usb_jtag_activity does most of the work. It now happens to behave just like
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169 | // the combination of FT245BM and Altera-programmed EPM7064 CPLD in Altera's
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170 | // USB-Blaster. The CPLD knows two major modes: Bit banging mode and Byte
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171 | // shift mode. It starts in Bit banging mode. While bytes are received
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172 | // from the host on EP2OUT, each byte B of them is processed as follows:
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173 | //
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174 | // Please note: nCE, nCS, LED pins and DATAOUT actually aren't supported here.
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175 | // Support for these would be required for AS/PS mode and isn't too complicated,
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176 | // but I haven't had the time yet.
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177 | //
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178 | // Bit banging mode:
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179 | //
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180 | // 1. Remember bit 6 (0x40) in B as the "Read bit".
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181 | //
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182 | // 2. If bit 7 (0x40) is set, switch to Byte shift mode for the coming
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183 | // X bytes ( X := B & 0x3F ), and don't do anything else now.
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184 | //
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185 | // 3. Otherwise, set the JTAG signals as follows:
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186 | // TCK/DCLK high if bit 0 was set (0x01), otherwise low
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187 | // TMS/nCONFIG high if bit 1 was set (0x02), otherwise low
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188 | // nCE high if bit 2 was set (0x04), otherwise low
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189 | // nCS high if bit 3 was set (0x08), otherwise low
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190 | // TDI/ASDI/DATA0 high if bit 4 was set (0x10), otherwise low
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191 | // Output Enable/LED active if bit 5 was set (0x20), otherwise low
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192 | //
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193 | // 4. If "Read bit" (0x40) was set, record the state of TDO(CONF_DONE) and
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194 | // DATAOUT(nSTATUS) pins and put it as a byte ((DATAOUT<<1)|TDO) in the
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195 | // output FIFO _to_ the host (the code here reads TDO only and assumes
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196 | // DATAOUT=1)
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197 | //
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198 | // Byte shift mode:
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199 | //
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200 | // 1. Load shift register with byte from host
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201 | //
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202 | // 2. Do 8 times (i.e. for each bit of the byte; implemented in shift.a51)
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203 | // 2a) if nCS=1, set carry bit from TDO, else set carry bit from DATAOUT
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204 | // 2b) Rotate shift register through carry bit
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205 | // 2c) TDI := Carry bit
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206 | // 2d) Raise TCK, then lower TCK.
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207 | //
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208 | // 3. If "Read bit" was set when switching into byte shift mode,
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209 | // record the shift register content and put it into the FIFO
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210 | // _to_ the host.
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211 | //
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212 | // Some more (minor) things to consider to emulate the FT245BM:
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213 | //
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214 | // a) The FT245BM seems to transmit just packets of no more than 64 bytes
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215 | // (which perfectly matches the USB spec). Each packet starts with
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216 | // two non-data bytes (I use 0x31,0x60 here). A USB sniffer on Windows
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217 | // might show a number of packets to you as if it was a large transfer
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218 | // because of the way that Windows understands it: it _is_ a large
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219 | // transfer until terminated with an USB packet smaller than 64 byte.
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220 | //
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221 | // b) The Windows driver expects to get some data packets (with at least
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222 | // the two leading bytes 0x31,0x60) immediately after "resetting" the
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223 | // FT chip and then in regular intervals. Otherwise a blue screen may
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224 | // appear... In the code below, I make sure that every 10ms there is
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225 | // some packet.
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226 | //
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227 | // c) Vendor specific commands to configure the FT245 are mostly ignored
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228 | // in my code. Only those for reading the EEPROM are processed. See
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229 | // DR_GetStatus and DR_VendorCmd below for my implementation.
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230 | //
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231 | // All other TD_ and DR_ functions remain as provided with CY3681.
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232 | //
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233 | //-----------------------------------------------------------------------------
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234 |
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235 | void usb_jtag_activity(void) // Called repeatedly while the device is idle
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236 | {
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237 | if(!Running) return;
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238 |
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239 | ProgIO_Poll();
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240 |
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241 | if(!(EP1INCS & bmEPBUSY))
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242 | {
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243 | if(Pending > 0)
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244 | {
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245 | BYTE o, n;
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246 |
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247 | AUTOPTRH2 = MSB( EP1INBUF );
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248 | AUTOPTRL2 = LSB( EP1INBUF );
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249 |
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250 | XAUTODAT2 = 0x31;
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251 | XAUTODAT2 = 0x60;
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252 |
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253 | if(Pending > 0x3E) { n = 0x3E; Pending -= n; }
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254 | else { n = Pending; Pending = 0; };
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255 |
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256 | o = n;
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257 |
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258 | #ifdef USE_MOD256_OUTBUFFER
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259 | APTR1H = MSB( OutBuffer );
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260 | APTR1L = FirstDataInOutBuffer;
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261 | while(n--)
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262 | {
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263 | XAUTODAT2 = XAUTODAT1;
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264 | APTR1H = MSB( OutBuffer ); // Stay within 256-Byte-Buffer
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265 | };
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266 | FirstDataInOutBuffer = APTR1L;
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267 | #else
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268 | APTR1H = MSB( &(OutBuffer[FirstDataInOutBuffer]) );
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269 | APTR1L = LSB( &(OutBuffer[FirstDataInOutBuffer]) );
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270 | while(n--)
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271 | {
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272 | XAUTODAT2 = XAUTODAT1;
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273 |
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274 | if(++FirstDataInOutBuffer >= OUTBUFFER_LEN)
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275 | {
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276 | FirstDataInOutBuffer = 0;
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277 | APTR1H = MSB( OutBuffer );
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278 | APTR1L = LSB( OutBuffer );
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279 | };
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280 | };
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281 | #endif
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282 | SYNCDELAY;
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283 | EP1INBC = 2 + o;
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284 | TF2 = 1; // Make sure there will be a short transfer soon
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285 | }
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286 | else if(TF2)
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287 | {
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288 | EP1INBUF[0] = 0x31;
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289 | EP1INBUF[1] = 0x60;
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290 | SYNCDELAY;
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291 | EP1INBC = 2;
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292 | TF2 = 0;
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293 | };
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294 | };
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295 |
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296 | if(!(EP2468STAT & bmEP2EMPTY) && (Pending < OUTBUFFER_LEN-0x3F))
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297 | {
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298 | WORD i, n = EP2BCL|EP2BCH<<8;
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299 |
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300 | APTR1H = MSB( EP2FIFOBUF );
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301 | APTR1L = LSB( EP2FIFOBUF );
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302 |
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303 | for(i=0;i<n;)
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304 | {
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305 | if(ClockBytes > 0)
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306 | {
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307 | WORD m;
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308 |
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309 | m = n-i;
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310 | if(ClockBytes < m) m = ClockBytes;
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311 | ClockBytes -= m;
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312 | i += m;
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313 |
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314 | /* Shift out 8 bits from d */
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315 |
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316 | if(WriteOnly) /* Shift out 8 bits from d */
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317 | {
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318 | while(m--) ProgIO_ShiftOut(XAUTODAT1);
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319 | }
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320 | else /* Shift in 8 bits at the other end */
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321 | {
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322 | while(m--) OutputByte(ProgIO_ShiftInOut(XAUTODAT1));
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323 | }
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324 | }
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325 | else
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326 | {
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327 | BYTE d = XAUTODAT1;
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328 | WriteOnly = (d & bmBIT6) ? FALSE : TRUE;
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329 |
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330 | if(d & bmBIT7)
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331 | {
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332 | /* Prepare byte transfer, do nothing else yet */
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333 |
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334 | ClockBytes = d & 0x3F;
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335 | }
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336 | else
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337 | {
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338 | if(WriteOnly)
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339 | ProgIO_Set_State(d);
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340 | else
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341 | OutputByte(ProgIO_Set_Get_State(d));
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342 | };
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343 | i++;
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344 | };
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345 | };
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346 |
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347 | SYNCDELAY;
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348 | EP2BCL = 0x80; // Re-arm endpoint 2
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349 | };
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350 | }
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351 |
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352 | //-----------------------------------------------------------------------------
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353 | // Handler for Vendor Requests (
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354 | //-----------------------------------------------------------------------------
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355 |
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356 | unsigned char app_vendor_cmd(void)
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357 | {
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358 | // because of fx2/usb_common.c, this code returns nonzero on success
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359 | // OUT requests. Pretend we handle them all...
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360 |
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361 | if ((bRequestType & bmRT_DIR_MASK) == bmRT_DIR_OUT)
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362 | {
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363 | if(bRequest == RQ_GET_STATUS)
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364 | {
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365 | Running = 1;
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366 | }
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367 |
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368 | if (bRequest == VEN_SPI_WR) // 0x99
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369 | {
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370 | // get EP0 data
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371 | EP0BCL = 0; // arm EP0 for OUT xfer. This sets the busy bit
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372 |
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373 | while (EP0CS & bmEPBUSY) // wait for busy to clear
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374 | ;
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375 |
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376 | // head_hi, head_l , format , address, *buf , len
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377 | return !spi_write (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, EP0BCL);
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378 | }
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379 |
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380 |
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381 | return 1;
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382 | }
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383 |
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384 | // IN requests.
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385 |
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386 | // change USB speed
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387 | if (bRequest == 0x91)
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388 | {
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389 | if (wIndexL == 0) // high speed
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390 | {
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391 | CT1 &= ~0x02;
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392 | fx2_renumerate(); // renumerate
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393 | }
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394 | else // full speed
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395 | {
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396 | CT1 |= 0x02;
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397 | fx2_renumerate(); // renumerate
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398 | }
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399 | }
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400 |
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401 | // change synchronous/asynchronous mode
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402 | if (bRequest == 0x92)
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403 | {
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404 | if(IFCONFIG & bmASYNC)
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405 | {
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406 | IFCONFIG &= ~bmASYNC;
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407 | }
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408 | else
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409 | {
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410 | IFCONFIG |= bmASYNC;
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411 | }
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412 | }
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413 |
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414 | if (bRequest == 0x93) // change to synchronous mode
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415 | {
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416 | IFCONFIG &= ~bmASYNC;
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417 | }
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418 |
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419 | if (bRequest == VEN_SPI_EN) // 0x96
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420 | {
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421 | SPI_OE |= bmSPI_OE; // PA.0,1,3,7 output enable
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422 | init_spi();
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423 | EP0BUF[0] = 0;
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424 | EP0BUF[1] = 0;
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425 | }
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426 |
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427 | if (bRequest == VEN_SPI_DIS) // 0x97
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428 | {
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429 | SPI_OE &= ~bmSPI_OE; // PA.0,1,3,7 output disable
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430 | EP0BUF[0] = 0x42;
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431 | EP0BUF[1] = 0x43;
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432 | EP0BUF[2] = 0x42;
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433 | EP0BUF[3] = 0x43;
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434 | EP0BCH = 0;
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435 | EP0BCL = wLengthL;
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436 | return 1;
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437 | }
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438 |
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439 | if (bRequest == VEN_SPI_RD) // 0x98
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440 | {
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441 | // header_H,header_L, format, address, *buf , len
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442 | if (spi_read (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, wLengthL))
|
---|
443 | return 0;
|
---|
444 |
|
---|
445 | EP0BCH = 0;
|
---|
446 | EP0BCL = wLengthL;
|
---|
447 | return 1;
|
---|
448 | }
|
---|
449 |
|
---|
450 | if(bRequest == 0x90)
|
---|
451 | {
|
---|
452 | BYTE addr = (wIndexL<<1) & 0x7F;
|
---|
453 | EP0BUF[0] = eeprom[addr];
|
---|
454 | EP0BUF[1] = eeprom[addr+1];
|
---|
455 | }
|
---|
456 | else
|
---|
457 | {
|
---|
458 | // dummy data
|
---|
459 | EP0BUF[0] = 0x36;
|
---|
460 | EP0BUF[1] = 0x83;
|
---|
461 | }
|
---|
462 |
|
---|
463 | EP0BCH = 0;
|
---|
464 | EP0BCL = (wLengthL<2) ? wLengthL : 2; // Arm endpoint with # bytes to transfer
|
---|
465 |
|
---|
466 | return 1;
|
---|
467 | }
|
---|
468 |
|
---|
469 | //-----------------------------------------------------------------------------
|
---|
470 |
|
---|
471 | static void main_loop(void)
|
---|
472 | {
|
---|
473 | while(1)
|
---|
474 | {
|
---|
475 | if(usb_setup_packet_avail()) usb_handle_setup_packet();
|
---|
476 | usb_jtag_activity();
|
---|
477 | }
|
---|
478 | }
|
---|
479 |
|
---|
480 | //-----------------------------------------------------------------------------
|
---|
481 |
|
---|
482 | void main(void)
|
---|
483 | {
|
---|
484 | EA = 0; // disable all interrupts
|
---|
485 |
|
---|
486 | usb_jtag_init();
|
---|
487 | eeprom_init();
|
---|
488 | setup_autovectors();
|
---|
489 | usb_install_handlers();
|
---|
490 |
|
---|
491 |
|
---|
492 | EA = 1; // enable interrupts
|
---|
493 |
|
---|
494 | fx2_renumerate(); // simulates disconnect / reconnect
|
---|
495 |
|
---|
496 | main_loop();
|
---|
497 | }
|
---|
498 |
|
---|
499 |
|
---|
500 |
|
---|
501 |
|
---|