| 1 | usb_jtag using Cypress FX2 chip
|
|---|
| 2 | ===============================
|
|---|
| 3 |
|
|---|
| 4 | The code in this directory is for Cypress FX2 (e.g. CY7C68013A) and can be compiled with
|
|---|
| 5 | the SDCC compiler (I tried version 2.6 as shipped with Ubuntu 6.10). Once I had a version
|
|---|
| 6 | that could be compiled with Keil tools (until early 2007), but switched to SDCC because I
|
|---|
| 7 | usually develop on a Linux host.
|
|---|
| 8 |
|
|---|
| 9 | No logic beside the FX2 itself and only a few external components are required for a basic
|
|---|
| 10 | JTAG adapter. I don't have detailed schematics available; my test setup consists of a FX2
|
|---|
| 11 | on a custom board where it's directly connected to a Cyclone FPGA.
|
|---|
| 12 |
|
|---|
| 13 | ____________
|
|---|
| 14 | | |
|
|---|
| 15 | | Cypress |
|
|---|
| 16 | USB__| EZ-USB FX2 |__JTAG(TDI,TDO,TCK,TMS)
|
|---|
| 17 | | CY7C68013A |
|
|---|
| 18 | |____________|
|
|---|
| 19 | __|__________
|
|---|
| 20 | | |
|
|---|
| 21 | | 24 MHz XTAL |
|
|---|
| 22 | |_____________|
|
|---|
| 23 |
|
|---|
| 24 |
|
|---|
| 25 | Similar eval boards are now available from fpga4fun.com - the boards named
|
|---|
| 26 | "Saxo-L" and "Xylo-EM" are pre-wired for use with an adapted version of my
|
|---|
| 27 | code, while "Saxo" and "Xylo" can be used after soldering 4 extra wires:
|
|---|
| 28 |
|
|---|
| 29 | http://www.fpga4fun.com/board_Xylo.html
|
|---|
| 30 |
|
|---|
| 31 |
|
|---|
| 32 | As is, the code assumes the following pin assignment:
|
|---|
| 33 |
|
|---|
| 34 | Port C.0: TDI
|
|---|
| 35 | Port C.1: TDO
|
|---|
| 36 | Port C.2: TCK
|
|---|
| 37 | Port C.3: TMS
|
|---|
| 38 |
|
|---|
| 39 | Other assignments are possible; you'll have to adapt the definitions in hardware.h and maybe
|
|---|
| 40 | in hardware.c, too.
|
|---|
| 41 |
|
|---|
| 42 | The USB identification data (vendor/product ID, strings, ...) can be modified in dscr.a51. My
|
|---|
| 43 | firmware emulates the 128 byte EEPROM that usually holds configuration data for the FT245 and
|
|---|
| 44 | which can be read from the host; its content is computed from the data in dscr.a51 as well.
|
|---|
| 45 |
|
|---|
| 46 | The WAKEUP pin should be high for the re-numeration to work reliably (thanks Jean/fpga4fun!)
|
|---|
| 47 |
|
|---|
| 48 | From this release on, there is new code to support running in the "Xilinx
|
|---|
| 49 | Platform Cable USB". If you select HARDWARE=hw_xpcu_i or hw_xpcu_x at the top
|
|---|
| 50 | of the Makefile, a firmware for the XPCU will be built. I've tested this only
|
|---|
| 51 | with unmodified CPLD version 18 (0x12) on a Spartan-3E starter kit, as it was
|
|---|
| 52 | programmed by my WebPack 8.2i. The code needs optimization; yet it is merely a
|
|---|
| 53 | proof of concept.
|
|---|
| 54 |
|
|---|
| 55 | hw_xpcu_i: Access "internal" chain (the XPCU CPLD, IC3, itself)
|
|---|
| 56 | hw_xpcu_x: Access "external" chain (the Spartan 3E, PROM, etc.)
|
|---|
| 57 |
|
|---|
| 58 | Changes since previous release on 2007-01-28:
|
|---|
| 59 | - Initial suppport for running on Xilinx XPCU.
|
|---|
| 60 | - New FX2 code, based on USRP2 from the GNU Radio Project;
|
|---|
| 61 | - Firmware can now be compiled using SDCC 2.6. No more Keil support.
|
|---|
| 62 | - EEPROM content is automatically computed from descriptors, including checksum.
|
|---|
| 63 |
|
|---|
| 64 | Changes since initial release on 2006-04-23:
|
|---|
| 65 | - added this readme.txt
|
|---|
| 66 | - reorganized my project folder: diff is now created from Subversion repository
|
|---|
| 67 | - stripped *.dist extension from eeprom.c and dscr.a51
|
|---|
| 68 | - added unique proper product and vendor ID (thanks to Antti Lukats!)
|
|---|
| 69 | - fixed checksum in eeprom.c
|
|---|
| 70 | - added comments about AS/PS mode pins in usbjtag.c
|
|---|
| 71 |
|
|---|
| 72 |
|
|---|
| 73 |
|
|---|
| 74 |
|
|---|
