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| 1 | ==== SPI Master on FX2 ====
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| 2 |
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| 3 | This firmware implements a SPI Master.
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| 4 |
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| 5 | The following pins on IOA are used :
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| 6 |
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| 7 | SCLK BIT0
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| 8 | SDO BIT1
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| 9 | SDI BIT3
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| 10 | SS_N BIT7
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| 11 |
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| 12 | There is only one slave select available (all other pins of IOA are being used
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| 13 | by used by bulk transfer control lines, and the other IOx aren't routed to the
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| 14 | fpga)
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| 15 |
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| 16 | By default, those lines are not enabled.
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| 17 |
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| 18 | Control of the SPI master is done through vendor commands. Those include:
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| 19 | - Output enable VEN_SPI_EN 0x96
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| 20 | - Output disable VEN_SPI_DIS 0x97
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| 21 | - Read VEN_SPI_RD 0x98
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| 22 | - Write VEN_SPI_WR 0x99
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| 23 |
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| 24 | spi specific code is in spi.c
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| 25 |
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| 26 | ==== C code examples ====
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| 27 | To be done
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| 28 |
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| 29 |
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| 30 |
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| 31 | --- 2008, Matthias P. Braendli
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