source: trunk/FirmwareFX2/hw_basic.c@ 21

Last change on this file since 21 was 19, checked in by demin, 15 years ago

fix OE bitmasks

File size: 6.1 KB
Line 
1/*-----------------------------------------------------------------------------
2 * Hardware-dependent code for usb_jtag
3 *-----------------------------------------------------------------------------
4 * Copyright (C) 2007 Kolja Waschk, ixo.de
5 *-----------------------------------------------------------------------------
6 * This code is part of usbjtag. usbjtag is free software; you can redistribute
7 * it and/or modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the License,
9 * or (at your option) any later version. usbjtag is distributed in the hope
10 * that it will be useful, but WITHOUT ANY WARRANTY; without even the implied
11 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. You should have received a
13 * copy of the GNU General Public License along with this program in the file
14 * COPYING; if not, write to the Free Software Foundation, Inc., 51 Franklin
15 * St, Fifth Floor, Boston, MA 02110-1301 USA
16 *-----------------------------------------------------------------------------
17 */
18
19#include <fx2regs.h>
20#include "hardware.h"
21#include "delay.h"
22
23//-----------------------------------------------------------------------------
24
25#define HAVE_OE_LED 1
26
27//-----------------------------------------------------------------------------
28
29/* JTAG TDI */
30
31sbit at 0xB3 TDI; /* Port D.3 */
32#define bmTDIOE bmBIT3
33#define SetTDI(x) do{TDI=(x);}while(0)
34
35/* JTAG TCK */
36
37sbit at 0xB2 TCK; /* Port D.2 */
38#define bmTCKOE bmBIT2
39#define SetTCK(x) do{TCK=(x);}while(0)
40
41/* JTAG TMS */
42
43sbit at 0xB1 TMS; /* Port D.1 */
44#define bmTMSOE bmBIT1
45#define SetTMS(x) do{TMS=(x);}while(0)
46
47/* JTAG TDO */
48
49sbit at 0xB0 TDO; /* Port D.0 */
50#define bmTDOOE bmBIT0
51#define GetTDO(x) TDO
52
53//-----------------------------------------------------------------------------
54
55#ifdef HAVE_OE_LED
56
57 sbit at 0xB4 OELED; /* Port D.4 */
58 #define bmOELEDOE bmBIT4
59 #define SetOELED(x) do{OELED=(x);}while(0)
60
61#else
62
63 #define bmOELEDOE 0
64 #define SetOELED(x) while(0){}
65
66#endif
67
68//-----------------------------------------------------------------------------
69
70#define bmPROGOUTOE (bmTCKOE|bmTDIOE|bmTMSOE|bmOELEDOE)
71#define bmPROGINOE (bmTDOOE)
72
73//-----------------------------------------------------------------------------
74
75void ProgIO_Poll(void) {}
76// These aren't called anywhere in usbjtag.c, but I plan to do so...
77void ProgIO_Enable(void) {}
78void ProgIO_Disable(void) {}
79void ProgIO_Deinit(void) {}
80
81
82void ProgIO_Init(void)
83{
84 /* The following code depends on your actual circuit design.
85 Make required changes _before_ you try the code! */
86
87 // set the CPU clock to 48MHz, enable clock output to FPGA
88 CPUCS = bmCLKOE | bmCLKSPD1;
89
90 // Use internal 48 MHz, enable output, use "Port" mode for all pins
91 IFCONFIG = bmIFCLKSRC | bm3048MHZ | bmIFCLKOE | bmIFCFG1 | bmIFCFG0;
92
93 // Output enable (TDO input, others output)
94 OED = (OED&~bmPROGINOE) | bmPROGOUTOE;
95}
96
97void ProgIO_Set_State(unsigned char d)
98{
99 /* Set state of output pins:
100 *
101 * d.0 => TCK
102 * d.1 => TMS
103 * d.4 => TDI
104 * d.5 => LED / Output Enable
105 */
106
107 SetTCK((d & bmBIT0) ? 1 : 0);
108 SetTMS((d & bmBIT1) ? 1 : 0);
109 SetTDI((d & bmBIT4) ? 1 : 0);
110#ifdef HAVE_OE_LED
111 SetOELED((d & bmBIT5) ? 1 : 0);
112#endif
113}
114
115unsigned char ProgIO_Set_Get_State(unsigned char d)
116{
117 /* Set state of output pins (s.a.)
118 * then read state of input pins:
119 *
120 * TDO => d.0
121 */
122
123 ProgIO_Set_State(d);
124 return 2|GetTDO();
125}
126
127//-----------------------------------------------------------------------------
128
129void ProgIO_ShiftOut(unsigned char c)
130{
131 /* Shift out byte C:
132 *
133 * 8x {
134 * Output least significant bit on TDI
135 * Raise TCK
136 * Shift c right
137 * Lower TCK
138 * }
139 */
140
141 (void)c; /* argument passed in DPL */
142
143 _asm
144 MOV A,DPL
145 ;; Bit0
146 RRC A
147 MOV _TDI,C
148 SETB _TCK
149 ;; Bit1
150 RRC A
151 CLR _TCK
152 MOV _TDI,C
153 SETB _TCK
154 ;; Bit2
155 RRC A
156 CLR _TCK
157 MOV _TDI,C
158 SETB _TCK
159 ;; Bit3
160 RRC A
161 CLR _TCK
162 MOV _TDI,C
163 SETB _TCK
164 ;; Bit4
165 RRC A
166 CLR _TCK
167 MOV _TDI,C
168 SETB _TCK
169 ;; Bit5
170 RRC A
171 CLR _TCK
172 MOV _TDI,C
173 SETB _TCK
174 ;; Bit6
175 RRC A
176 CLR _TCK
177 MOV _TDI,C
178 SETB _TCK
179 ;; Bit7
180 RRC A
181 CLR _TCK
182 MOV _TDI,C
183 SETB _TCK
184 NOP
185 CLR _TCK
186 ret
187 _endasm;
188}
189
190/*
191;; For ShiftInOut, the timing is a little more
192;; critical because we have to read _TDO/shift/set _TDI
193;; when _TCK is low. But 20% duty cycle at 48/4/5 MHz
194;; is just like 50% at 6 Mhz, and that's still acceptable
195*/
196
197unsigned char ProgIO_ShiftInOut(unsigned char c)
198{
199 /* Shift out byte C, shift in from TDO:
200 *
201 * 8x {
202 * Read carry from TDO
203 * Output least significant bit on TDI
204 * Raise TCK
205 * Shift c right, append carry (TDO) at left
206 * Lower TCK
207 * }
208 * Return c.
209 */
210
211 (void)c; /* argument passed in DPL */
212
213 _asm
214 MOV A,DPL
215
216 ;; Bit0
217 MOV C,_TDO
218 RRC A
219 MOV _TDI,C
220 SETB _TCK
221 CLR _TCK
222 ;; Bit1
223 MOV C,_TDO
224 RRC A
225 MOV _TDI,C
226 SETB _TCK
227 CLR _TCK
228 ;; Bit2
229 MOV C,_TDO
230 RRC A
231 MOV _TDI,C
232 SETB _TCK
233 CLR _TCK
234 ;; Bit3
235 MOV C,_TDO
236 RRC A
237 MOV _TDI,C
238 SETB _TCK
239 CLR _TCK
240 ;; Bit4
241 MOV C,_TDO
242 RRC A
243 MOV _TDI,C
244 SETB _TCK
245 CLR _TCK
246 ;; Bit5
247 MOV C,_TDO
248 RRC A
249 MOV _TDI,C
250 SETB _TCK
251 CLR _TCK
252 ;; Bit6
253 MOV C,_TDO
254 RRC A
255 MOV _TDI,C
256 SETB _TCK
257 CLR _TCK
258 ;; Bit7
259 MOV C,_TDO
260 RRC A
261 MOV _TDI,C
262 SETB _TCK
263 CLR _TCK
264
265 MOV DPL,A
266 ret
267 _endasm;
268
269 /* return value in DPL */
270
271 return c;
272}
273
274
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