[9] | 1 | /*-----------------------------------------------------------------------------
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| 2 | * Hardware-dependent code for usb_jtag
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| 3 | *-----------------------------------------------------------------------------
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| 4 | * Copyright (C) 2007 Kolja Waschk, ixo.de
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| 5 | *-----------------------------------------------------------------------------
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| 6 | * This code is part of usbjtag. usbjtag is free software; you can redistribute
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| 7 | * it and/or modify it under the terms of the GNU General Public License as
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| 8 | * published by the Free Software Foundation; either version 2 of the License,
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| 9 | * or (at your option) any later version. usbjtag is distributed in the hope
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| 10 | * that it will be useful, but WITHOUT ANY WARRANTY; without even the implied
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| 11 | * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 12 | * GNU General Public License for more details. You should have received a
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| 13 | * copy of the GNU General Public License along with this program in the file
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| 14 | * COPYING; if not, write to the Free Software Foundation, Inc., 51 Franklin
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| 15 | * St, Fifth Floor, Boston, MA 02110-1301 USA
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| 16 | *-----------------------------------------------------------------------------
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| 17 | */
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| 18 |
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| 19 | #include <fx2regs.h>
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| 20 | #include "hardware.h"
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| 21 | #include "delay.h"
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| 22 |
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| 23 | //-----------------------------------------------------------------------------
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| 24 |
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| 25 | #define HAVE_OE_LED 1
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| 26 |
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| 27 | //-----------------------------------------------------------------------------
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| 28 |
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[19] | 29 | /* JTAG TDI */
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[9] | 30 |
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| 31 | sbit at 0xB3 TDI; /* Port D.3 */
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[19] | 32 | #define bmTDIOE bmBIT3
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[9] | 33 | #define SetTDI(x) do{TDI=(x);}while(0)
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| 34 |
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[19] | 35 | /* JTAG TCK */
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[9] | 36 |
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| 37 | sbit at 0xB2 TCK; /* Port D.2 */
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[19] | 38 | #define bmTCKOE bmBIT2
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[9] | 39 | #define SetTCK(x) do{TCK=(x);}while(0)
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| 40 |
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[19] | 41 | /* JTAG TMS */
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[9] | 42 |
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| 43 | sbit at 0xB1 TMS; /* Port D.1 */
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[19] | 44 | #define bmTMSOE bmBIT1
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[9] | 45 | #define SetTMS(x) do{TMS=(x);}while(0)
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| 46 |
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[19] | 47 | /* JTAG TDO */
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[9] | 48 |
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| 49 | sbit at 0xB0 TDO; /* Port D.0 */
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[19] | 50 | #define bmTDOOE bmBIT0
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[9] | 51 | #define GetTDO(x) TDO
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| 52 |
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| 53 | //-----------------------------------------------------------------------------
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| 54 |
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| 55 | #ifdef HAVE_OE_LED
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| 56 |
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| 57 | sbit at 0xB4 OELED; /* Port D.4 */
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[19] | 58 | #define bmOELEDOE bmBIT4
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[9] | 59 | #define SetOELED(x) do{OELED=(x);}while(0)
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| 60 |
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| 61 | #else
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| 62 |
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| 63 | #define bmOELEDOE 0
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| 64 | #define SetOELED(x) while(0){}
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| 65 |
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| 66 | #endif
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| 67 |
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| 68 | //-----------------------------------------------------------------------------
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| 69 |
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| 70 | #define bmPROGOUTOE (bmTCKOE|bmTDIOE|bmTMSOE|bmOELEDOE)
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| 71 | #define bmPROGINOE (bmTDOOE)
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| 72 |
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| 73 | //-----------------------------------------------------------------------------
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| 74 |
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| 75 | void ProgIO_Poll(void) {}
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| 76 | // These aren't called anywhere in usbjtag.c, but I plan to do so...
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| 77 | void ProgIO_Enable(void) {}
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| 78 | void ProgIO_Disable(void) {}
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| 79 | void ProgIO_Deinit(void) {}
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| 80 |
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| 81 |
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| 82 | void ProgIO_Init(void)
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| 83 | {
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| 84 | /* The following code depends on your actual circuit design.
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| 85 | Make required changes _before_ you try the code! */
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| 86 |
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| 87 | // set the CPU clock to 48MHz, enable clock output to FPGA
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| 88 | CPUCS = bmCLKOE | bmCLKSPD1;
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| 89 |
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[19] | 90 | // Use internal 48 MHz, enable output, use "Port" mode for all pins
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| 91 | IFCONFIG = bmIFCLKSRC | bm3048MHZ | bmIFCLKOE | bmIFCFG1 | bmIFCFG0;
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[9] | 92 |
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[19] | 93 | // Output enable (TDO input, others output)
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[9] | 94 | OED = (OED&~bmPROGINOE) | bmPROGOUTOE;
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| 95 | }
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| 96 |
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| 97 | void ProgIO_Set_State(unsigned char d)
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| 98 | {
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| 99 | /* Set state of output pins:
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| 100 | *
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| 101 | * d.0 => TCK
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| 102 | * d.1 => TMS
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| 103 | * d.4 => TDI
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| 104 | * d.5 => LED / Output Enable
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| 105 | */
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| 106 |
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| 107 | SetTCK((d & bmBIT0) ? 1 : 0);
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| 108 | SetTMS((d & bmBIT1) ? 1 : 0);
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| 109 | SetTDI((d & bmBIT4) ? 1 : 0);
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| 110 | #ifdef HAVE_OE_LED
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| 111 | SetOELED((d & bmBIT5) ? 1 : 0);
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| 112 | #endif
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| 113 | }
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| 114 |
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| 115 | unsigned char ProgIO_Set_Get_State(unsigned char d)
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| 116 | {
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| 117 | /* Set state of output pins (s.a.)
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| 118 | * then read state of input pins:
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| 119 | *
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| 120 | * TDO => d.0
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| 121 | */
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| 122 |
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| 123 | ProgIO_Set_State(d);
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[19] | 124 | return 2|GetTDO();
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[9] | 125 | }
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| 126 |
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| 127 | //-----------------------------------------------------------------------------
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| 128 |
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| 129 | void ProgIO_ShiftOut(unsigned char c)
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| 130 | {
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[19] | 131 | /* Shift out byte C:
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[9] | 132 | *
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| 133 | * 8x {
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| 134 | * Output least significant bit on TDI
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| 135 | * Raise TCK
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| 136 | * Shift c right
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| 137 | * Lower TCK
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| 138 | * }
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| 139 | */
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| 140 |
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| 141 | (void)c; /* argument passed in DPL */
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| 142 |
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| 143 | _asm
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| 144 | MOV A,DPL
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| 145 | ;; Bit0
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| 146 | RRC A
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| 147 | MOV _TDI,C
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| 148 | SETB _TCK
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| 149 | ;; Bit1
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| 150 | RRC A
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| 151 | CLR _TCK
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| 152 | MOV _TDI,C
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| 153 | SETB _TCK
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| 154 | ;; Bit2
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| 155 | RRC A
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| 156 | CLR _TCK
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| 157 | MOV _TDI,C
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| 158 | SETB _TCK
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| 159 | ;; Bit3
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| 160 | RRC A
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| 161 | CLR _TCK
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| 162 | MOV _TDI,C
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| 163 | SETB _TCK
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| 164 | ;; Bit4
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| 165 | RRC A
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| 166 | CLR _TCK
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| 167 | MOV _TDI,C
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| 168 | SETB _TCK
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| 169 | ;; Bit5
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| 170 | RRC A
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| 171 | CLR _TCK
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| 172 | MOV _TDI,C
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| 173 | SETB _TCK
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| 174 | ;; Bit6
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| 175 | RRC A
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| 176 | CLR _TCK
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| 177 | MOV _TDI,C
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| 178 | SETB _TCK
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| 179 | ;; Bit7
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| 180 | RRC A
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| 181 | CLR _TCK
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| 182 | MOV _TDI,C
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| 183 | SETB _TCK
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| 184 | NOP
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| 185 | CLR _TCK
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| 186 | ret
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| 187 | _endasm;
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| 188 | }
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| 189 |
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| 190 | /*
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| 191 | ;; For ShiftInOut, the timing is a little more
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| 192 | ;; critical because we have to read _TDO/shift/set _TDI
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| 193 | ;; when _TCK is low. But 20% duty cycle at 48/4/5 MHz
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| 194 | ;; is just like 50% at 6 Mhz, and that's still acceptable
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| 195 | */
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| 196 |
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| 197 | unsigned char ProgIO_ShiftInOut(unsigned char c)
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| 198 | {
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| 199 | /* Shift out byte C, shift in from TDO:
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| 200 | *
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| 201 | * 8x {
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| 202 | * Read carry from TDO
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| 203 | * Output least significant bit on TDI
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| 204 | * Raise TCK
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| 205 | * Shift c right, append carry (TDO) at left
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| 206 | * Lower TCK
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| 207 | * }
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| 208 | * Return c.
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| 209 | */
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| 210 |
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| 211 | (void)c; /* argument passed in DPL */
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| 212 |
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| 213 | _asm
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| 214 | MOV A,DPL
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| 215 |
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| 216 | ;; Bit0
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| 217 | MOV C,_TDO
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| 218 | RRC A
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| 219 | MOV _TDI,C
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| 220 | SETB _TCK
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| 221 | CLR _TCK
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| 222 | ;; Bit1
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| 223 | MOV C,_TDO
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| 224 | RRC A
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| 225 | MOV _TDI,C
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| 226 | SETB _TCK
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| 227 | CLR _TCK
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| 228 | ;; Bit2
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| 229 | MOV C,_TDO
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| 230 | RRC A
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| 231 | MOV _TDI,C
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| 232 | SETB _TCK
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| 233 | CLR _TCK
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| 234 | ;; Bit3
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| 235 | MOV C,_TDO
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| 236 | RRC A
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| 237 | MOV _TDI,C
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| 238 | SETB _TCK
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| 239 | CLR _TCK
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| 240 | ;; Bit4
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| 241 | MOV C,_TDO
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| 242 | RRC A
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| 243 | MOV _TDI,C
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| 244 | SETB _TCK
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| 245 | CLR _TCK
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| 246 | ;; Bit5
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| 247 | MOV C,_TDO
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| 248 | RRC A
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| 249 | MOV _TDI,C
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| 250 | SETB _TCK
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| 251 | CLR _TCK
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| 252 | ;; Bit6
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| 253 | MOV C,_TDO
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| 254 | RRC A
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| 255 | MOV _TDI,C
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| 256 | SETB _TCK
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| 257 | CLR _TCK
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| 258 | ;; Bit7
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| 259 | MOV C,_TDO
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| 260 | RRC A
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| 261 | MOV _TDI,C
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| 262 | SETB _TCK
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| 263 | CLR _TCK
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| 264 |
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| 265 | MOV DPL,A
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| 266 | ret
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| 267 | _endasm;
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| 268 |
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| 269 | /* return value in DPL */
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| 270 |
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| 271 | return c;
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| 272 | }
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| 273 |
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| 274 |
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