source: trunk/FirmwareFX2/hw_basic.c@ 17

Last change on this file since 17 was 9, checked in by demin, 15 years ago

fix EOL codes

File size: 6.3 KB
RevLine 
[9]1/*-----------------------------------------------------------------------------
2 * Hardware-dependent code for usb_jtag
3 *-----------------------------------------------------------------------------
4 * Copyright (C) 2007 Kolja Waschk, ixo.de
5 *-----------------------------------------------------------------------------
6 * This code is part of usbjtag. usbjtag is free software; you can redistribute
7 * it and/or modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the License,
9 * or (at your option) any later version. usbjtag is distributed in the hope
10 * that it will be useful, but WITHOUT ANY WARRANTY; without even the implied
11 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. You should have received a
13 * copy of the GNU General Public License along with this program in the file
14 * COPYING; if not, write to the Free Software Foundation, Inc., 51 Franklin
15 * St, Fifth Floor, Boston, MA 02110-1301 USA
16 *-----------------------------------------------------------------------------
17 */
18
19#include <fx2regs.h>
20#include "hardware.h"
21#include "delay.h"
22
23//-----------------------------------------------------------------------------
24
25#define HAVE_OE_LED 1
26
27//-----------------------------------------------------------------------------
28
29/* JTAG TDI, AS ASDI, PS DATA0 */
30
31sbit at 0xB3 TDI; /* Port D.3 */
32#define bmTDIOE bmBIT0
33#define SetTDI(x) do{TDI=(x);}while(0)
34
35/* JTAG TCK, AS/PS DCLK */
36
37sbit at 0xB2 TCK; /* Port D.2 */
38#define bmTCKOE bmBIT3
39#define SetTCK(x) do{TCK=(x);}while(0)
40
41/* JTAG TMS, AS/PS nCONFIG */
42
43sbit at 0xB1 TMS; /* Port D.1 */
44#define bmTMSOE bmBIT2
45#define SetTMS(x) do{TMS=(x);}while(0)
46
47/* JTAG TDO, AS/PS CONF_DONE */
48
49sbit at 0xB0 TDO; /* Port D.0 */
50#define bmTDOOE bmBIT1
51#define GetTDO(x) TDO
52
53//-----------------------------------------------------------------------------
54
55#ifdef HAVE_OE_LED
56
57 sbit at 0xB4 OELED; /* Port D.4 */
58 #define bmOELEDOE bmBIT7
59 #define SetOELED(x) do{OELED=(x);}while(0)
60
61#else
62
63 #define bmOELEDOE 0
64 #define SetOELED(x) while(0){}
65
66#endif
67
68//-----------------------------------------------------------------------------
69
70#define bmPROGOUTOE (bmTCKOE|bmTDIOE|bmTMSOE|bmOELEDOE)
71#define bmPROGINOE (bmTDOOE)
72
73//-----------------------------------------------------------------------------
74
75void ProgIO_Poll(void) {}
76// These aren't called anywhere in usbjtag.c, but I plan to do so...
77void ProgIO_Enable(void) {}
78void ProgIO_Disable(void) {}
79void ProgIO_Deinit(void) {}
80
81
82void ProgIO_Init(void)
83{
84 /* The following code depends on your actual circuit design.
85 Make required changes _before_ you try the code! */
86
87 // set the CPU clock to 48MHz, enable clock output to FPGA
88 CPUCS = bmCLKOE | bmCLKSPD1;
89
90 // Use external clock, use "Slave FIFO" mode for all pins
91 IFCONFIG = bmIFCFG1 | bmIFCFG0;
92
93 // TDO input, others output
94 OED = (OED&~bmPROGINOE) | bmPROGOUTOE;
95}
96
97void ProgIO_Set_State(unsigned char d)
98{
99 /* Set state of output pins:
100 *
101 * d.0 => TCK
102 * d.1 => TMS
103 * d.2 => nCE (only #ifdef HAVE_AS_MODE)
104 * d.3 => nCS (only #ifdef HAVE_AS_MODE)
105 * d.4 => TDI
106 * d.5 => LED / Output Enable
107 */
108
109 SetTCK((d & bmBIT0) ? 1 : 0);
110 SetTMS((d & bmBIT1) ? 1 : 0);
111 SetTDI((d & bmBIT4) ? 1 : 0);
112#ifdef HAVE_OE_LED
113 SetOELED((d & bmBIT5) ? 1 : 0);
114#endif
115}
116
117unsigned char ProgIO_Set_Get_State(unsigned char d)
118{
119 /* Set state of output pins (s.a.)
120 * then read state of input pins:
121 *
122 * TDO => d.0
123 * DATAOUT => d.1 (only #ifdef HAVE_AS_MODE)
124 */
125
126 ProgIO_Set_State(d);
127 return 2|GetTDO(); /* DATAOUT assumed high, no AS mode */
128}
129
130//-----------------------------------------------------------------------------
131
132void ProgIO_ShiftOut(unsigned char c)
133{
134 /* Shift out byte C:
135 *
136 * 8x {
137 * Output least significant bit on TDI
138 * Raise TCK
139 * Shift c right
140 * Lower TCK
141 * }
142 */
143
144 (void)c; /* argument passed in DPL */
145
146 _asm
147 MOV A,DPL
148 ;; Bit0
149 RRC A
150 MOV _TDI,C
151 SETB _TCK
152 ;; Bit1
153 RRC A
154 CLR _TCK
155 MOV _TDI,C
156 SETB _TCK
157 ;; Bit2
158 RRC A
159 CLR _TCK
160 MOV _TDI,C
161 SETB _TCK
162 ;; Bit3
163 RRC A
164 CLR _TCK
165 MOV _TDI,C
166 SETB _TCK
167 ;; Bit4
168 RRC A
169 CLR _TCK
170 MOV _TDI,C
171 SETB _TCK
172 ;; Bit5
173 RRC A
174 CLR _TCK
175 MOV _TDI,C
176 SETB _TCK
177 ;; Bit6
178 RRC A
179 CLR _TCK
180 MOV _TDI,C
181 SETB _TCK
182 ;; Bit7
183 RRC A
184 CLR _TCK
185 MOV _TDI,C
186 SETB _TCK
187 NOP
188 CLR _TCK
189 ret
190 _endasm;
191}
192
193/*
194;; For ShiftInOut, the timing is a little more
195;; critical because we have to read _TDO/shift/set _TDI
196;; when _TCK is low. But 20% duty cycle at 48/4/5 MHz
197;; is just like 50% at 6 Mhz, and that's still acceptable
198*/
199
200unsigned char ProgIO_ShiftInOut(unsigned char c)
201{
202 /* Shift out byte C, shift in from TDO:
203 *
204 * 8x {
205 * Read carry from TDO
206 * Output least significant bit on TDI
207 * Raise TCK
208 * Shift c right, append carry (TDO) at left
209 * Lower TCK
210 * }
211 * Return c.
212 */
213
214 (void)c; /* argument passed in DPL */
215
216 _asm
217 MOV A,DPL
218
219 ;; Bit0
220 MOV C,_TDO
221 RRC A
222 MOV _TDI,C
223 SETB _TCK
224 CLR _TCK
225 ;; Bit1
226 MOV C,_TDO
227 RRC A
228 MOV _TDI,C
229 SETB _TCK
230 CLR _TCK
231 ;; Bit2
232 MOV C,_TDO
233 RRC A
234 MOV _TDI,C
235 SETB _TCK
236 CLR _TCK
237 ;; Bit3
238 MOV C,_TDO
239 RRC A
240 MOV _TDI,C
241 SETB _TCK
242 CLR _TCK
243 ;; Bit4
244 MOV C,_TDO
245 RRC A
246 MOV _TDI,C
247 SETB _TCK
248 CLR _TCK
249 ;; Bit5
250 MOV C,_TDO
251 RRC A
252 MOV _TDI,C
253 SETB _TCK
254 CLR _TCK
255 ;; Bit6
256 MOV C,_TDO
257 RRC A
258 MOV _TDI,C
259 SETB _TCK
260 CLR _TCK
261 ;; Bit7
262 MOV C,_TDO
263 RRC A
264 MOV _TDI,C
265 SETB _TCK
266 CLR _TCK
267
268 MOV DPL,A
269 ret
270 _endasm;
271
272 /* return value in DPL */
273
274 return c;
275}
276
277
278
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