| [9] | 1 | /*-----------------------------------------------------------------------------
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| 2 | * Hardware-dependent code for usb_jtag
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| 3 | *-----------------------------------------------------------------------------
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| 4 | * Copyright (C) 2007 Kolja Waschk, ixo.de
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| 5 | *-----------------------------------------------------------------------------
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| 6 | * This code is part of usbjtag. usbjtag is free software; you can redistribute
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| 7 | * it and/or modify it under the terms of the GNU General Public License as
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| 8 | * published by the Free Software Foundation; either version 2 of the License,
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| 9 | * or (at your option) any later version. usbjtag is distributed in the hope
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| 10 | * that it will be useful, but WITHOUT ANY WARRANTY; without even the implied
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| 11 | * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 12 | * GNU General Public License for more details. You should have received a
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| 13 | * copy of the GNU General Public License along with this program in the file
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| 14 | * COPYING; if not, write to the Free Software Foundation, Inc., 51 Franklin
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| 15 | * St, Fifth Floor, Boston, MA 02110-1301 USA
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| 16 | *-----------------------------------------------------------------------------
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| 17 | */
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| 18 |
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| 19 | #include <fx2regs.h>
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| 20 | #include "hardware.h"
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| 21 | #include "delay.h"
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| 22 |
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| 23 | //-----------------------------------------------------------------------------
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| 24 |
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| 25 | #define HAVE_OE_LED 1
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| 26 |
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| 27 | //-----------------------------------------------------------------------------
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| 28 |
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| 29 | /* JTAG TDI, AS ASDI, PS DATA0 */
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| 30 |
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| 31 | sbit at 0xB3 TDI; /* Port D.3 */
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| 32 | #define bmTDIOE bmBIT0
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| 33 | #define SetTDI(x) do{TDI=(x);}while(0)
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| 34 |
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| 35 | /* JTAG TCK, AS/PS DCLK */
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| 36 |
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| 37 | sbit at 0xB2 TCK; /* Port D.2 */
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| 38 | #define bmTCKOE bmBIT3
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| 39 | #define SetTCK(x) do{TCK=(x);}while(0)
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| 40 |
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| 41 | /* JTAG TMS, AS/PS nCONFIG */
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| 42 |
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| 43 | sbit at 0xB1 TMS; /* Port D.1 */
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| 44 | #define bmTMSOE bmBIT2
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| 45 | #define SetTMS(x) do{TMS=(x);}while(0)
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| 46 |
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| 47 | /* JTAG TDO, AS/PS CONF_DONE */
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| 48 |
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| 49 | sbit at 0xB0 TDO; /* Port D.0 */
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| 50 | #define bmTDOOE bmBIT1
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| 51 | #define GetTDO(x) TDO
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| 52 |
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| 53 | //-----------------------------------------------------------------------------
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| 54 |
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| 55 | #ifdef HAVE_OE_LED
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| 56 |
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| 57 | sbit at 0xB4 OELED; /* Port D.4 */
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| 58 | #define bmOELEDOE bmBIT7
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| 59 | #define SetOELED(x) do{OELED=(x);}while(0)
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| 60 |
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| 61 | #else
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| 62 |
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| 63 | #define bmOELEDOE 0
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| 64 | #define SetOELED(x) while(0){}
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| 65 |
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| 66 | #endif
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| 67 |
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| 68 | //-----------------------------------------------------------------------------
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| 69 |
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| 70 | #define bmPROGOUTOE (bmTCKOE|bmTDIOE|bmTMSOE|bmOELEDOE)
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| 71 | #define bmPROGINOE (bmTDOOE)
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| 72 |
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| 73 | //-----------------------------------------------------------------------------
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| 74 |
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| 75 | void ProgIO_Poll(void) {}
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| 76 | // These aren't called anywhere in usbjtag.c, but I plan to do so...
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| 77 | void ProgIO_Enable(void) {}
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| 78 | void ProgIO_Disable(void) {}
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| 79 | void ProgIO_Deinit(void) {}
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| 80 |
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| 81 |
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| 82 | void ProgIO_Init(void)
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| 83 | {
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| 84 | /* The following code depends on your actual circuit design.
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| 85 | Make required changes _before_ you try the code! */
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| 86 |
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| 87 | // set the CPU clock to 48MHz, enable clock output to FPGA
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| 88 | CPUCS = bmCLKOE | bmCLKSPD1;
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| 89 |
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| 90 | // Use external clock, use "Slave FIFO" mode for all pins
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| 91 | IFCONFIG = bmIFCFG1 | bmIFCFG0;
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| 92 |
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| 93 | // TDO input, others output
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| 94 | OED = (OED&~bmPROGINOE) | bmPROGOUTOE;
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| 95 | }
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| 96 |
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| 97 | void ProgIO_Set_State(unsigned char d)
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| 98 | {
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| 99 | /* Set state of output pins:
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| 100 | *
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| 101 | * d.0 => TCK
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| 102 | * d.1 => TMS
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| 103 | * d.2 => nCE (only #ifdef HAVE_AS_MODE)
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| 104 | * d.3 => nCS (only #ifdef HAVE_AS_MODE)
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| 105 | * d.4 => TDI
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| 106 | * d.5 => LED / Output Enable
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| 107 | */
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| 108 |
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| 109 | SetTCK((d & bmBIT0) ? 1 : 0);
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| 110 | SetTMS((d & bmBIT1) ? 1 : 0);
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| 111 | SetTDI((d & bmBIT4) ? 1 : 0);
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| 112 | #ifdef HAVE_OE_LED
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| 113 | SetOELED((d & bmBIT5) ? 1 : 0);
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| 114 | #endif
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| 115 | }
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| 116 |
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| 117 | unsigned char ProgIO_Set_Get_State(unsigned char d)
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| 118 | {
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| 119 | /* Set state of output pins (s.a.)
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| 120 | * then read state of input pins:
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| 121 | *
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| 122 | * TDO => d.0
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| 123 | * DATAOUT => d.1 (only #ifdef HAVE_AS_MODE)
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| 124 | */
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| 125 |
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| 126 | ProgIO_Set_State(d);
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| 127 | return 2|GetTDO(); /* DATAOUT assumed high, no AS mode */
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| 128 | }
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| 129 |
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| 130 | //-----------------------------------------------------------------------------
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| 131 |
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| 132 | void ProgIO_ShiftOut(unsigned char c)
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| 133 | {
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| 134 | /* Shift out byte C:
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| 135 | *
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| 136 | * 8x {
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| 137 | * Output least significant bit on TDI
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| 138 | * Raise TCK
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| 139 | * Shift c right
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| 140 | * Lower TCK
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| 141 | * }
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| 142 | */
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| 143 |
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| 144 | (void)c; /* argument passed in DPL */
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| 145 |
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| 146 | _asm
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| 147 | MOV A,DPL
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| 148 | ;; Bit0
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| 149 | RRC A
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| 150 | MOV _TDI,C
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| 151 | SETB _TCK
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| 152 | ;; Bit1
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| 153 | RRC A
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| 154 | CLR _TCK
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| 155 | MOV _TDI,C
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| 156 | SETB _TCK
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| 157 | ;; Bit2
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| 158 | RRC A
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| 159 | CLR _TCK
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| 160 | MOV _TDI,C
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| 161 | SETB _TCK
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| 162 | ;; Bit3
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| 163 | RRC A
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| 164 | CLR _TCK
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| 165 | MOV _TDI,C
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| 166 | SETB _TCK
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| 167 | ;; Bit4
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| 168 | RRC A
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| 169 | CLR _TCK
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| 170 | MOV _TDI,C
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| 171 | SETB _TCK
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| 172 | ;; Bit5
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| 173 | RRC A
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| 174 | CLR _TCK
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| 175 | MOV _TDI,C
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| 176 | SETB _TCK
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| 177 | ;; Bit6
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| 178 | RRC A
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| 179 | CLR _TCK
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| 180 | MOV _TDI,C
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| 181 | SETB _TCK
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| 182 | ;; Bit7
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| 183 | RRC A
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| 184 | CLR _TCK
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| 185 | MOV _TDI,C
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| 186 | SETB _TCK
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| 187 | NOP
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| 188 | CLR _TCK
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| 189 | ret
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| 190 | _endasm;
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| 191 | }
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| 192 |
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| 193 | /*
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| 194 | ;; For ShiftInOut, the timing is a little more
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| 195 | ;; critical because we have to read _TDO/shift/set _TDI
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| 196 | ;; when _TCK is low. But 20% duty cycle at 48/4/5 MHz
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| 197 | ;; is just like 50% at 6 Mhz, and that's still acceptable
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| 198 | */
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| 199 |
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| 200 | unsigned char ProgIO_ShiftInOut(unsigned char c)
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| 201 | {
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| 202 | /* Shift out byte C, shift in from TDO:
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| 203 | *
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| 204 | * 8x {
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| 205 | * Read carry from TDO
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| 206 | * Output least significant bit on TDI
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| 207 | * Raise TCK
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| 208 | * Shift c right, append carry (TDO) at left
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| 209 | * Lower TCK
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| 210 | * }
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| 211 | * Return c.
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| 212 | */
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| 213 |
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| 214 | (void)c; /* argument passed in DPL */
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| 215 |
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| 216 | _asm
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| 217 | MOV A,DPL
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| 218 |
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| 219 | ;; Bit0
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| 220 | MOV C,_TDO
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| 221 | RRC A
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| 222 | MOV _TDI,C
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| 223 | SETB _TCK
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| 224 | CLR _TCK
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| 225 | ;; Bit1
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| 226 | MOV C,_TDO
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| 227 | RRC A
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| 228 | MOV _TDI,C
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| 229 | SETB _TCK
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| 230 | CLR _TCK
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| 231 | ;; Bit2
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| 232 | MOV C,_TDO
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| 233 | RRC A
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| 234 | MOV _TDI,C
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| 235 | SETB _TCK
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| 236 | CLR _TCK
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| 237 | ;; Bit3
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| 238 | MOV C,_TDO
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| 239 | RRC A
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| 240 | MOV _TDI,C
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| 241 | SETB _TCK
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| 242 | CLR _TCK
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| 243 | ;; Bit4
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| 244 | MOV C,_TDO
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| 245 | RRC A
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| 246 | MOV _TDI,C
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| 247 | SETB _TCK
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| 248 | CLR _TCK
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| 249 | ;; Bit5
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| 250 | MOV C,_TDO
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| 251 | RRC A
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| 252 | MOV _TDI,C
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| 253 | SETB _TCK
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| 254 | CLR _TCK
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| 255 | ;; Bit6
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| 256 | MOV C,_TDO
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| 257 | RRC A
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| 258 | MOV _TDI,C
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| 259 | SETB _TCK
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| 260 | CLR _TCK
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| 261 | ;; Bit7
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| 262 | MOV C,_TDO
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| 263 | RRC A
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| 264 | MOV _TDI,C
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| 265 | SETB _TCK
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| 266 | CLR _TCK
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| 267 |
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| 268 | MOV DPL,A
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| 269 | ret
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| 270 | _endasm;
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| 271 |
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| 272 | /* return value in DPL */
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| 273 |
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| 274 | return c;
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| 275 | }
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| 276 |
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| 277 |
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| 278 |
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